VLSI Signal Processing

Kittitornkun, Surin; Hu, Yu Hen

doi:10.1016/B978-012170960-0/50067-0

VLSI Signal Processing

Author(s)

Kittitornkun, Surin

Hu, Yu Hen

Date Issued

December 1, 2005

Type

Book Chapter

DOI

10.1016/B978-012170960-0/50067-0

Abstract

The field of very large scale integrated (VLSI) signal processing concerns the design and implementation of signal processing algorithms using application-specific VLSI architecture, including programmable digital signal processors and dedicated signal processors implemented with VLSI technology. This chapter surveys important developments in this field, including algorithm design, architecture development, and design methodology. It also emphasizes DSP algorithm to hardware synthesis and its hardware implementation. An implementation of a digital signal processing (DSP) algorithm consists of the computer program of that algorithm and the hardware on which the program is executed. A DSP algorithm can be expressed as an n-level nested Do-loop, a recurrent equation, and a data flow graph (DFG). Next, one of these representations gets synthesized to its hardware counter- part. The hardware architecture is not only driven by the algorithm representation but also the sampling rate of input/ output signals. Due to limited hardware resources, operations and data of a particular algorithm can be scheduled at the right time and assigned at the right execution unit basis provided that the precedence and semantics are preserved. For a high- throughput application such as image/video processing, synthesis of a regular network of processing elements (PEs) is discussed in detail. Eventually, implementation technology and tools of a particular architecture are surveyed. © 2005 Copyright © 2005 Elsevier Inc. All rights reserved.

Citation

Electrical Engineering Handbook, 933-948, 2005