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Full adder circuit using multi-input MRL
Author(s)
Yamtim, Suparlerk
Date Issued
July 1, 2020
Type
Conference Paper
Abstract
this paper proposes the Full Adder Circuit using Multi-Input MRL without CMOS. It is designed by Multi-Input MRL which component and delay time less than 1-bit full adder circuit using Hybrid Memristor-CMOS logic. Structure of Purpose circuit is most simple. The performances of Purpose circuit are compared with another full adder circuits are carried out by using LTspice simulator
Citation
Proceedings 2020 6th International Conference on Engineering Applied Sciences and Technology Iceast 2020, 2020
Subjects