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Digital technique to generate variable and multiple PWM signals

Author(s)
Pongswatd, Sawai
Chaikla, Amphawan
Ukakimapurn, Prapart
Tirasesth, Kitti
Date Issued
January 1, 2007
Type
Conference Paper
DOI
10.1109/ICICIC.2007.266
Abstract
In this paper, we present a digital technique to generate Pulse Width Modulation (PWM) signal using counters, comparators, and latching circuits implemented by Verilog HDL program based on FPGA. The proposed technique can simultaneously generate variable and multiple PWM outputs with parallel processing. Setting each reference-input signal can independently and easily vary the pulse width of each generated signal. The FPGA-based implementation can minimize the size of hardware. The communication can be easily done via a personnel computer. Application example in the design of the proposed technique as the parallel processing is also included. © 2007 IEEE.
Citation
Second International Conference on Innovative Computing Information and Control Icicic 2007, 2007
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