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OTA-Based high frequency CMOS multiplier and squaring circuit
Author(s)
Date Issued
January 1, 2009
Type
Conference Paper
Abstract
A gigahertz analog multiplier based on OTA and squaring is proposed. The multipliehas gigahertz frequency response is suitable to use in communication system. The circuitisbased on 0.18 pm CMOS technology simulated using PSPICE level 7. This technique provides;wide dynamic range, GHz-bandwidth response and low power consumption. The proposed circuithas been simulated with PSPICE and achieved -3dB bandwidth of 3.96GHz. The total power dissipation is 0.588mW with ±1V power supply voltages.
Citation
2008 International Symposium on Intelligent Signal Processing and Communication Systems Ispacs 2008, 2009