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Measured and Extraction of Coupling Capacitive of Metal Interconnect Layers in VLSI
Author(s)
Date Issued
July 2, 2018
Type
Conference Paper
Abstract
This paper presents the measurement and extraction of the capacitance for multilayer interconnections in VLSI. The capacitance of the capacitive coupling between interconnect is measured as a function of the varying frequency in order to develop a capacitance versus frequency curve. The multi-fringe structure of interconnect metal1 layer and interconnect metal2 layer \pmb{(\text{L}=400\mu \text{m}, \ \text{no}. \ \text{strip} =80)} with the total perimeter of capacitive coupling is approximately \pmb{3.16\times 10 {4}} \pmb{\mu} \mathbf{m} of value and the area is \pmb{2.8\times 10 {4}} \ \pmb{\mu\text{m} {2}} of value are tested respectively. The line width and line spacing ratio (W/S) of interconnect is varying from 0.9/0.6, 0.9/0.9, 0.9/1.05 and 0.9/1.2 with the measured frequency of 10kHz, 100kHz, 250kHz, 500kHz, IMHZ and 5 MHz are measured. The coupling of interconnect per unit length at various line spacing as a function of measured frequency of metal1 and metal2 are reported and discussed. The results show that the coupling capacitance per unit length \pmb{(\text{F}/\mu \text{m})} increases as the spacing between adjacent interconnect lines is deceased.
Citation
Ieecon 2018 6th International Electrical Engineering Congress, 2018
Subjects