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Analog operation in CMOS latch circuit for reducing dynamic power dissipation
Analog operation in CMOS latch circuit for reducing dynamic power dissipation
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Date
2003-01-02
Authors
K. Dejhan
F. Cheevasuvit
V. Tipsuwanporn
T. Trisuwannawat
E. Prommas
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https://dspace.kmitl.ac.th/handle/123456789/418
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