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KMITL
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An FPGA Architecture for ASIC-FPGA Co-design to Streamline Processing of IDSs
An FPGA Architecture for ASIC-FPGA Co-design to Streamline Processing of IDSs
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Date
2016-10-01
Authors
Tomoaki Sato
Sorawat Chivapreecha
Phichet Moungnoul
Kohji Higuchi
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Keywords
Application-specific integrated circuit
,
FPGA prototype
,
Gate array
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URI
https://dspace.kmitl.ac.th/handle/123456789/5951
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