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Effect of Pt-doped on the photocurrent of MSM photodetector
(2021-05-29)
Sangwaranatee, N.
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Srithanachai, I.
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Niemcharoen, S.
This article report the fabrication and characteristics of MSM photo detector by compare between non-doped and doped platinum (Pt) atom. Fabrication process has same but different in Pt doping process for atom doping and diffusion process. The metal finger width 2um with 50 um spacing between metal contact. At bias voltage 10 voltage show higher capacitance-voltage and photocurrent increase after doped with Pt atom. By experiment shows photocurrent increase around 4 times from 45.98 to 197.22 uA at bias 10 voltage by photoluminescence 25,000 lux.
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Microstructure of ITO for Transparent Electrode on Glass Slide Prepare by RF Sputtering Technique
(2021-05-29)
Sangwaranatee, N.
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Srithanachai, I.
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Niemcharoen, S.
Indium tin oxide (ITO) is an absorber photovoltaic material and widely used for semiconductor work for long time. ITO has characteristics by high transparent and low resistivity that can use for electrode of photodetector. Area of photodetector has use for metal contact but if change metal contact to transparent contact will get more photocurrent. However, this paper will investigate microstructure of ITO by analyze physical properties of material by various deposite time. The results show that transparent properties show around 97% at growth 1h and annealing at 500 C. XRD results show ITO peak (222), (400), (622) and (441) at sputtering time 60 mins.
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Surface Thermal and Electric charge of PN Diode Expose by Soft Radiation Flash Exposure
(2020-01-07)
Sangwaranatee, N.
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Srithanachai, I.
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Niemcharoen, S.
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Chaiyasoonthorn, S.
In this study present the effect of soft radiation flash exposure (SRFE) to forward bias current-voltage (I-V) of PN diode by using COMSOL simulation program. The results show surface thermal and electric change while expose by radiation with flash exposure technique. Series resistance (R<inf>s</inf>) increase around 2 times and close to idea case after expose by radiation, the radiation will impact to bulk defect and reduce surface recombination. SRFE induce temperature on surface and deep into silicon bulk. The value of R<inf>s</inf> increase with increase expose time. The changing of R<inf>s</inf> becomes independent from radiation dose at high forward bias voltage.
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Investigation the Effect of Soft X-ray Flash Exposure on PN Diode
(2020-01-07)
Chaiyasoonthorn, S.
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Srithanachai, I.
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Niemcharoen, S.
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Sangwaranatee, N.
In this paper will present the properties of PN diode before and after expose by radiation. Although, radiation help to improve the performance of semiconductor device but still has some damage in device structure. In previous article I have showed performance improve after expose by soft radiation. The device is exposed by low frequency X-ray radiation (soft radiation flash exposure: SRFE) technique with few second for several times. In principle of PN diode after fabrication will has defects from process such as ion implantation, doped and silicon wafer process. The results show temperature while SRFE expose on device that generate high temperature on surface and silicon boundary that may the optimize energy and expose time for treatment damage of PN diode.
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Development a novel model of threshold voltage of NMOS with temperature dependence and narrow channel width
(2016-09-06)
Ruangphanit, A.
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Poyai, A.
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Muanghlua, R.
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Niemcharoen, S.
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Titiroongruang, W.
In paper, a development a novel model of threshold voltage of NMOS with temperature dependence and narrow channel width was presented. The models have been developed including the temperature affect of surface potentials, intrinsic carrier concentration and energy band gap. The threshold voltages were measured by the linear extrapolation methodology. The temperature dependence and the body-bias dependence of threshold voltage model of a big NMOS and a narrow channel width NMOS are proposed. The results show that, the measured threshold voltage compared with the development threshold voltage model was low level error.
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A new model for predicting the effect of temperature and devices dimension on threshold voltage of PMOS in VLSI
(2015-08-17)
Ruangphanit, A.
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Poyai, A.
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Sakuna, N.
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Niemcharoen, S.
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Muanghlua, R.
This paper presents a new model for predicting the effect of temperature and the devices dimension on the threshold voltage of PMOS. Temperature-dependent models have been developed including the temperature affect of surface potentials, intrinsic carrier concentration and energy band gap. The developed models have been used to study the temperature dependent and narrow channel width on the threshold voltage of PMOS. The new temperature coefficient for threshold voltage and the body-bias coefficient of threshold voltage of a big PMOS and a narrow channel width of MOSFET are proposed. The model can be implemented in simulation tools with the error is less than 3%.
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Temperature and devices dimension dependence on threshold voltage, the low field mobilty and the series parasitic resistance of PMOSFET
(2013-09-02)
Sakuna, N.
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Muanghlua, R.
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Niemcharoen, S.
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Ruangphanit, A.
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Poyai, A.
This paper presents the temperature and devices dimension dependence on the threshold voltage, low field mobility and series parasitic resistance of PMOS over operating temperature range of 27 °C to 125 °C. The relation of I<inf>DS</inf> and V<inf>GS</inf> in linear region was used with a different of channel length and channel width. The parameters extraction procedure is based on the measurement of the transconductance characteristics of MOSFET in linear region. The results show that, the temperature coefficient for threshold voltage is around 1.7mV/K approximately. The low field mobility degradation parameter is decreased by the factor of 0.68. The temperature coefficient of source-drain series resistance per unit channel width (R<inf>DSW</inf>) is approximately 16.7 ohm-um/K. These data are necessary not only should be compared with the results of NMOS but also should be used for the circuit designer to understanding well in the elevated operating temperatures. © 2013 IEEE.
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The effects of temperature and device demension of MOSFETs on the DC characteristics of CMOS inverter
(2012-10-02)
Ruangphanit, A.
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Kiddee, K.
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Poyai, A.
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Wongprasert, Y.
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Niemcharoen, S.
The CMOS fabrication technology requires both n-channel (NMOS) and p-channel (PMOS) transistors be built on the same substrate. To ensure the reliability of the circuit performance over the temperature range, the circuits must be designed accommodate the basic variations parameters as a function of parameter. The temperature dependence of the MOSFET parameters as well as the small dimension effects on the dc characteristics of submicrometer CMOS inverters operated over the temperature range of 27- 125 degree Celsius are presented. The results show that the threshold voltage temperature coefficient (TCV) of both devices increased as the channel width decreased. PMOS has a larger affect more than NMOS because of a buried channel device. The Voltage Transfer Characteristics (VTC) of an inverter shows a symmetrical gate at WR is 2.0. However, the narrow channel effect, threshold voltage matching and ratio B <inf>R</inf> are key problem of CMOS inverter worked. Finally, these results will support the process engineer, circuit designer to improve device performance in the next fabrication. © 2012 IEEE.
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High speed photodetector using accelerated particles controlled by light
(2012-01-01)
Ueamanapong, S.
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Srithanachai, I.
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Niemcharoen, S.
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Yupapin, P. P.
In this paper, we propose a new design device that can be used to solve the performance degradation of a diode due to after-fabrication process problems which involves the silicon bulk defects. The optical tweezer technique has been used to control the movement of electrons, specifically an electron's speed using a PANDA ring. The PANDA microring is a new form of a modified add-drop filter that can be used to improve the switching speed of a diode by using the optical tweezers for trapping electrons' movement from anode contact to cathode contact. The trapping probe can be adjusted to fit for atom size of 200 pm (picometer) to 1.4 nm (nanometer) by controlling the ring parameters. The goal of this paper is to present the use of a PANDA microring for improving photodetector performance which can be used further for many applications. © 2012 World Scientific Publishing Company.
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Shot noise behavior of planar Mo/n-Si/Mo photodetector structure in avalanche mode
(2010-07-30)
Khunkhao, S.
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Umjaruan, C.
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Thaworn, A.
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Nuanloy, S.
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Niemcharoen, S.
Low-frequency (3 to 50 kHz) shot noise behavior of planar metal/semiconductor/metal photodetector (MSM-PD) structure operating under pre avalanching and avalanching conditions has been observed. The structure examined is Mo/n-Si/Mo structure with electrode separation of 20μm. In higher voltages applied, both device current and its photocurrent component showed a rapid increase at a critical bias voltage due to onset of avalanche multiplication. It was found that the associated shot noise factor Γ<sup>2</sup> varies in wide range from the order 0f 0.1 at pre-breakdown conditions to three orders of magnitude larger than unity corresponding to simple shot noise by avalanche multiplication. This result implies that the biasing condition for appropriate operation must be satisfied from the view point of signal-to noise ratio (S/N), when one operates this structure with high optical sensitivity. The value of noise factor obtained seems basically expressible by using existing theory with a little smaller exponent of multiplication factor.

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