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Author: search.filters.author.Phetchakul, ToempongSubject: search.filters.subject.p-n junctions

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    Defect distribution and yield analysis technique on silicon wafer
    (2014-01-01)
    Praepattarapisut, Warakorn
    ;
    Pengchan, Weera
    ;
    Phetchakul, Toempong
    ;
    Poyai, Amporn
    This paper presents the defect distribution and yield analysis on silicon wafer. The generation and recombination lifetime were the key parameters and obtained from the current- voltage and the capacitance-voltage of diode characteristics for forward bias. Then 3D contour maps were plotted as defect distribution and can be analyzed for the whole wafer which is useful for the yield analysis of the defects that were caused from fabrication process. © (2014) Trans Tech Publications, Switzerland.
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    Improved extraction of the local carrier generation lifetime from forward diode characteristics
    (2012-01-01)
    Pengchan, Weera
    ;
    Phetchakul, Toempong
    ;
    Poyai, Amporn
    This paper is proposed to extract the local carrier generation lifetime from forward current-voltage (I-V) characteristics of p-n junctions in case of non-uniform defects. The different geometry p-n junctions have been fabricated by a standard CMOS technology. The forward I-V and high frequency capacitance-voltage (C-V) characteristics of p-n junctions have been measured. The recombination current density can be extracted from the area forward current density by subtracting with the area diffusion current density. Form the recombination current density, the local generation and recombination lifetime can be obtained.