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Item type:Publication, A Low-Noise, Low-Power, Wide Dynamic Range Logarithmic Amplifier for Biomedical Applications(2018-06-30) ;Sundarasaradula, YuwadeeThanachayanont, ApinuntThis paper presents the design and realization of a low-noise, low-power, wide dynamic range CMOS logarithmic amplifier for biomedical applications. The proposed amplifier is based on the true piecewise linear function by using progressive-compression parallel-summation architecture. A DC offset cancellation feedback loop is used to prevent output saturation and deteriorated input sensitivity from inherent DC offset voltages. The proposed logarithmic amplifier was designed and fabricated in a standard 0.18μm CMOS technology. The prototype chip includes six limiting amplifier stages and an on-chip bias generator, occupying a die area of 0.027mm<sup>2</sup>. The overall circuit consumes 9.75μW from a single 1.5V power supply voltage. Measured results showed that the prototype logarithmic amplifier exhibited an 80dB input dynamic range (from 10μV to 100mV), a bandwidth of 4Hz-10kHz, and a total input-referred noise of 5.52μV. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A 1-V, 6-nW programmable 4th-order bandpass filter for biomedical applications(2016-10-01) ;Sundarasaradula, YuwadeeThanachayanont, ApinuntThis paper describes the design and realization of a programmable 4th-order, G<inf>m</inf>-C bandpass filter for biomedical applications. The core 2nd-order filter stage is realized by a simple gyrator-C active inductor structure with a single MOSFET as the transconductor element. The capacitive input attenuation technique is used to enhance the linearity of the filter. The proposed filter was designed and simulated with a 1-V power supply voltage with process parameters from a standard 0.18 µm CMOS technology. Post-layout simulation shows that the center frequency of the filter is adjustable from 80 Hz to 6.18 kHz by using a programmable bias current generator. At a nominal center frequency of 945 Hz and the quality factor of 3, the filter exhibits a dynamic range of 57.6 dB and an input-referred noise of 174.2 µV. The filter consumes only 6 nW from a 1-V single power supply voltage and the active area of the overall circuit is 0.088 mm<sup>2</sup>. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A 6-bit, two-step, successive approximation logarithmic ADC for biomedical applications(2016-01-01) ;Sundarasaradula, Yuwadee ;Constandinou, Timothy G.Thanachayanont, ApinuntThis paper presents the design and realization of a novel low-power 6-bit successive approximation logarithmic ADC for biomedical applications. A two-step successive approximation method is proposed to obtain a piecewise-linear approximation of the desired logarithmic transfer function. The proposed ADC has been designed and simulated using process parameters from a standard 0.35 μm 2P4M CMOS technology with a single 1.8 V power supply voltage. Simulation results show that, at a sampling rate of 25 kS/s, the proposed ADC consumes 4.36 μW to 14.6 μW (proportional to input amplitudes). The proposed ADC achieves 18.6 pJ/conversion-step, maximum INL of 0.45 LSB, an ENOB of 4.97-bits, and SNDR of 31.7 dB with 1 V full-scale input range. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A 1-V, 6-nW programmable 4th-order bandpass filter for biomedical applications(2015-08-06) ;Sundarasaradula, YuwadeeThanachayanont, ApinuntThis paper presents the design and realization of a programmable 4<sup>th</sup>-order bandpass filter for biomedical applications in a standard 0.18 μm CMOS technology. The center frequency is adjustable from 80 Hz to 7 KHz, using a 6-bit digital-to-analog-converter (DAC). At a center frequency of 1 KHz and quality factor of 4, the simulated dynamic range is 53.6 dB for 1% total harmonic distortion (THD) and the simulated total input-referred noise, integrated from 875 Hz to 1.125 KHz, is 177μV. The filter consumes only 6 nW from a 1-V single power supply voltage. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A 1.3-V, 9.1μW wide-dynamic range logarithmic amplifier for cochlear implant system(2014-01-01) ;Sundarasaradula, YuwadeeThanachayanont, ApinuntThis paper presents the design and realization of a low-noise, low-power, wide-dynamic-range CMOS logarithmic amplifier for cochlear implant system in a standard 0.18μm CMOS technology. The proposed logarithmic amplifier is based on the true piecewise linear function by using progressive-compression parallel-summation architecture. The overall circuit consumes only 9.1 μW from a 1.3 V single power supply voltage. The simulated input dynamic range is 80 dB, which covers the input amplitudes ranging from 10 μV to 100 mV. The simulated bandwidth of the amplifier is from 50 Hz to 24 kHz. The simulated total input-referred noise is 4.81 μV, integrated from 100 Hz to 10 kHz. © 2014 IEEE. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A 0.7-V, 2.86-μW low-noise logarithmic amplifier for neural recording system(2013-12-01) ;Sundarasaradula, YuwadeeThanachayanont, ApinuntThis paper describes the design and realization of a low-noise, low-voltage, low-power CMOS logarithmic amplifier for bio-signal and neural recording applications. The proposed logarithmic amplifier is based on the progressive-compression parallel-summation architecture with DC offset cancellation feedback loop. A new fully differential limiting amplifier with bulk-driven current mirror active load is proposed to achieve larger voltage gain and low voltage operation. The proposed logarithmic amplifier was designed and simulated with process parameters from a standard 0.18-μm CMOS technology. The circuit operates with a single 0.7-V power supply voltage and dissipates 2.86 μW. The simulated input dynamic range is about 60 dB, which covers the input amplitudes ranging from 10 μV to 10 mV. The simulated -3-dB bandwidth of the amplifier is from 0.32 Hz to 22 kHz. The simulated total input-referred noise, integrated from 0.1 Hz to 10 kHz, is 4.41 μV. © 2013 IEEE. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Temperature dependence of electrical characteristics on pn junction power diodes irradiated by X-ray(2012-10-02) ;Sundarasaradula, Yuwadee ;Sodhgam, Piyachat ;Amporn ;PoyaiKlunngien, NipapanThe purpose of this work is to study the effect of X-ray irradiation on pn junction power diode. The diodes were designed and fabricated using standard CMOS technology. Irradiation with exposure energy of 70 keV and various exposure times (5, 55, and 205 seconds) were applied on the diodes. The temperature dependence of the current-voltage (I-V) characteristics of the diodes was measured in the temperature range of 303K-393K. The effect on forward and reverse current can be explained through the following parameters such as saturation current (I <inf>o</inf>), series resistance (R <inf>s</inf>), and ideality factor (n). After irradiation the forward current was approximately three orders of magnitude higher than non-X-ray samples of all temperature conditions. This caused by the decreasing of the total series resistance. The increase in the values of I <inf>o</inf> with increasing temperature was observed. The value of n is essentially the same, close to 1, before X-ray and after X-ray of all temperature range of 303K-393K. © 2012 IEEE.1
