Tooprakai, Sirapop

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Tooprakai, Sirapop
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Tooprakai, Siraphop
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sirapop.to@kmitl.ac.th

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    Item type:Publication,
    Multi-input Memristor Rationed Logic Full Adder Circuit for Efficient Processing Time
    (2022-01-01)
    Yamtim, Suparlerk
    ;
    Tooprakai, Siraphop
    This research proposes a multi-input memristor rationed logic (MRL) 1-bit full adder circuit as an alternative to conventional multi-stage MRL full adders. The proposed multi-input 1-bit full adder circuit consisted of 25 memristors without CMOS transistor. Ripple carry adder was utilized to realize multi-input MRL 8-bit full adder circuit by cascading eight blocks of multi-input MRL 1-bit full adder. The advantages of the multi-input MRL 8-bit full adder include straightforwardness, compactness, and improved delay time. Simulations were carried out by using LTspice simulator and results compared with multi-stage full adders. The multi-input MRL 8-bit full adder circuit achieved higher processing-time efficiency and thereby holds great potential as an alternative to multi-stage full adders. The novelty of this research lies in the use of multi-input MRL technique to realize full adder circuits that effectively mitigate voltage degradation and improve delay time.
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    Design high speed and low power hybrid full adder circuit
    (2018-12-24)
    Lueangsongchai, Sathaporn
    ;
    Tooprakai, Siraphop
    This paper presents 1-bit hybrid full adder cells circuit scheme that high speed and low power consumption. This Full adder cells circuit is designed utilization of XOR gate, XNOR gate, pass logic gate and transmission gate. Result of simulation by HSPICE program based on 16 nm CMOS technology with 0.9V power supply voltage and maximum frequency at 8GHz.