Petchmaneelumka, Wandee

Preferred name

Alternative Name

Petchmaneelumka, W.

Main Affiliation

School of Engineering

wandee.pe@kmitl.ac.th

Now showing 1 - 10 of 15

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8-Electrode data collection system for electrical capacitance tomography
(2006-12-01)
Rerkratn, Apinai
;
Lertpakdee, Thanakorn
;
Chitsakul, Kitiphol
;
Sangworasil, Manas
;
Petchmaneelumka, Wandee
8-electrode data collection system for electrical capacitance tomography is presented. The system mainly consists of a signal generator, 8×2 multiplexer, detector, amplifier, band-pass filter, rms-to-dc converter, A/D converter circuit and control computer. Experimental results with a circular sensor show that the proposed system is able to collect data with satisfy sensitivities, linearity, resolution and also being insensitive to noise. Reconstructed images from collected data are shown. © 2006 ICASE.
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Advanced planning for multi-product across a supply chain
(2009-04-23)
Masuchun, Ruedee
;
Petchmaneelumka, Wandee
This paper presents a linear integer programming model to plan the production for multiple products. The production is planned using information shared across a supply chain. The advantage of information sharing has been proved from research that it can make the whole supply chain globally visualized and yet decreasing in variability on the supply chain. The objective function of the proposed model is to minimize the total costs involved including the production costs, the distribution costs, the setup costs of manufacturing, and the fixed costs of distributing. From previous research, one more restriction which is limitation of distribution centers has been added to make the model more realistic. Numerical results verify that this model can be used to generate feasible and optimal plans for multiple products across the supply chain. © 2009 IEEE.
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A current signal CMOS sample-and-hold circuit
(2007-12-01)
Luangpol, Amata
;
Petchmaneelumka, Wandee
;
Kamsri, Thawatchai
;
Riewruja, Vanchai
This article presents a current signal sample-and-hold (S/H) circuit using 0.5μm CMOS technology. A current minimum circuit is used to sample the input signal in place of a sampling switch used in the conventional S/H circuit. The current peak detector is used to hold the signal from the minimum circuit in the "hold" state. The proposed configuration is adopted effectively to cancel switch feedthrough error. The performances of the proposed circuit are demonstrated using the PSPICE analog simulation program. Simulation results show the sampling frequency up to 100MHz and high accuracy. © ICROS.
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Voltage signal Max/Min finder
(2009-12-01)
Lekthamrong, Chanon
;
Rerkratn, Apinai
;
Petchmaneelumka, Wandee
;
Riewruja, Vanchai
In this paper, a circuit technique to realize Max/Min finder for fuzzy applications is presented. The maximum or minimum operation can be provided by setting the external control current without changing the topology, while the input signals are in the voltage forms. The proposed Max/Min finder configuration is simple and suitable for fabrication in standard CMOS technology. The circuit performance is studied using PSPICE analog simulation program. Simulation results verifying the performance of the proposed scheme are agreed with the expected values. © 2009 SICE.
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Positive/negative floating resistor using OTAs
(2008-12-01)
Petchmaneelumka, Wandee
;
Julsereewong, Prasit
;
Riewruja, Vanchai
A method for realizing a floating resistor based on operational transconductanee amplifiers (OTAs) is presented in this paper. The proposed design is composed of only OTAs without any external resistor. The magnitude of the obtained resistance is electronically varied by adjusting the external bias currents of OTAs. Both a positive and a negative resistance can be achieved in the same circuit. The proposed scheme provides the simple configuration and low cost. The circuit performances based on the use of the commercially available OTAs are confirmed by the experimental results.
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A CMOS piecewise-linear circuit for nonlinear function syntheses
(2001-12-01)
Petchmaneelumka, Wandee
;
Chaikla, Amphawan
;
Pannil, Pittaya
;
Julprapa, Attaya
;
Riewruja, Vanchai
A piecewise-linear circuit element, termed a current limiter, is proposed in this paper. The limit-point and break-point of the current limiter can be electronically varied. The proposed circuits can be employed to synthesize accurately a large class of nonlinear function circuit. The proposed principle is suitable for implementation in a standard CMOS process. Simulation results showing the accuracy and linearity of the proposed circuits are also included.
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A current-mode CMOS sample-and-hold circuit for ADC
(2006-12-01)
Mahatthumthanant, Phinet
;
Kamsri, Thawatchai
;
Petchmaneelumka, Wandee
;
Sungkabunchoo, Tiparat
;
Riewruja, Vanchai
This paper presents a current-mode sample-and-hold circuit using 0.5μm CMOS technology. The input signal is sampled using a current subtracter and a half wave rectifier instead of a sampling switch used in the conventional sample-and-hold circuit. As a result, the switch feedthrough error is eliminated. The proposed circuit achieves high sampling frequency up to 100MHz and high accuracy. The performances of the proposed circuit are demonstrated by PSPICE simulation results. © 2006 ICASE.
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Floating current-controlled resistance converters using OTAs
(2008-11-01)
Riewruja, Vanchai
;
Petchmaneelumka, Wandee
A simple configuration to realize the floating resistance converters using operational transconductance amplifiers (OTAs) is introduced in this paper. Negative and positive resistances driven by both the voltage and current signals can be achieved in the same scheme. The magnitude of the resulting resistances can be electronically controlled by varying the bias current ratio of OTAs. In addition, the capacitance conversion can be also provided without stability problem. Experimental results verifying the performances of the proposed converters are presented. © 2007 Elsevier GmbH. All rights reserved.
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Temperature compensation of CMOS translinear current conveyor and OTA
(2001-12-01)
Chaikla, Amphawan
;
Julsereewong, Prasit
;
Petchmaneelumka, Wandee
;
Kamsri, Thawatchai
;
Riewruja, Vanchai
In this article, an integrable temperature compensation scheme for CMOS translinear second generation current conveyor (TCCII) and OTA is presented. The proposed scheme makes use of the new bias circuit, which has a current that is inversely proportional to the absolute temperature. The transconductance of both TCCII and OTA can also be linearly varied with the bias current. Performance of the proposed scheme is confirmed through PSPICE simulation program.
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OTA-based electronically adjustable floating positive/negative resistor
(2008-12-01)
Petchmaneelumka, Wandee
;
Kamsri, Thawatchai
;
Wangwiwatthana, Chaleampan
;
Riewruja, Vanchai
This paper presents a method to realize an operational transconductance amplifier (OTA) based adjustable floating resistor. The magnitude of the resulting resistance can be electrically varied by changing the external bias currents of OTAs. The proposed resistor is based on an active network termed "dual-output voltage-to-current (DO-V/I) converter", which is the OTA-based voltage-to-current converter with electronically variable property. The realization method provides both a positive and a negative resistance using the same scheme. The proposed design is attractive in the terms of simple configuration and low cost. Experimental results showing the circuit performance based on the use of the commercially available OTAs are included. © 2008 SICE.

Petchmaneelumka, Wandee

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