Jaikla, Winai

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Comparative performance study of multiple-input bulk-driven and multiple-input bulk-driven quasi-floating-gate DDCCs
(2019-08-01)
Khateb, Fabian
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Kulej, Tomasz
;
Kumngern, Montree
;
Jaikla, Winai
;
Ranjan, Rajeev Kumar
This brief presents a comparative performance study of two recently presented techniques, the multiple-input bulk-driven (MI-BD) and the multiple-input bulk-driven quasi-floating-gate (MI-BD-QFG) MOS transistors (MOST). These techniques offer simplified CMOS structures of specific active elements and ensure near rail-to-rail operation capability under extremely low-voltage supply and reduced power consumption. However, to clarify the pros and cons of each technique, two Differential Difference Current Conveyors (DDCC) using MI-BD and MI-BD-QFG are compared. For the purpose of comparison, theoretical analysis such as small-signal model, open-loop gain, terminal resistances, gain bandwidth product, input referred thermal noise and maximum input range of the DDCCs are included. Furthermore, in order to provide a fair performance comparison both of the DDCCs is supplied with 0.4 V and consume same power 140 nW. The DDCCs were fabricated in a standard n-well 0.18 µm CMOS process from TSMC and hence the results are confirmed theoretically and experimentally.
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A 0.5-V 95-dB rail-to-rail DDA for biosignal processing
(2022-02-01)
Khateb, Fabian
;
Kulej, Tomasz
;
Kumngern, Montree
;
Arbet, Daniel
;
Jaikla, Winai
This paper presents a new low-voltage CMOS structure for differential difference amplifier (DDA) optimized for low frequency biosignal processing. The DDA input stage is based on a non-tailed bulk-driven (BD) differential pair offering rail-to-rail input common mode range (ICMR) under 0.5 V voltage supply. Unlike the conventional two differential pairs DDA structure, the proposed one employs one differential pair created by the multiple-input MOS transistor (MI-MOST) technique offering simple circuitry. Although the bulk-driven and the MI-MOST techniques reduce the amplifier's transconductance, the gain is boosted by increasing the output resistance using a self-cascode transistor and a partial positive feedback. As a result, a 95-dB voltage gain is achieved which is larger than achieved gain for most sub-0.5 V designs presented in the literature. The DDA has 12.66 kHz gain bandwidth product, and consumes 313nW of power. The input thermal noise is 0.88 µV/Hz<sup>1/2</sup> and the average slew-rate is 14.7 V/ms at 20pF load capacitance. As an example of application, a band-pass filter (BPF) based on two DDAs with adjustable gain for electrocardiogram (ECG) signal processing is presented. The 0.18 µm CMOS technology from TSMC has been used and extensive simulation results in Cadence environment including process, voltage and temperature corners and Monte–Carlo analysis have been carried-out to demonstrate the robustness of the design.
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Multiple-input bulk-driven quasi-floating-gate MOS transistor for low-voltage low-power integrated circuits
(2019-02-01)
Khateb, Fabian
;
Kulej, Tomasz
;
Veldandi, Harikrishna
;
Jaikla, Winai
This brief presents the first experimental results of the multiple-input bulk-driven quasi-floating-gate (MI-BD-QFG) MOS transistor (MOST) which is suitable for low-voltage (LV) low-power (LP) integrated circuits design. The MI-BD-QFG MOST is an extension to the principle of the bulk-driven quasi-floating-gate (BD-QFG) MOST. However, unlike the BD-QFG the MI-BD-QFG MOST offers multiple-input that simplifies specific CMOS topologies and reduce their power consumption. To confirm the advantages of the MI-BD-QFG MOST a Differential Difference Current Conveyor (DDCC) with very simple CMOS structure has been designed and fabricated in a standard n-well 0.18 µm CMOS process from TSMC with total chip area 350 µm × 78 µm. The fabricated circuit uses a 0.5 V power supply, consumes 1.7 µW power and offers near rail-to-rail input common mode range.
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Electronically controlled voltage mode first order multifunction filter using low-voltage low-power bulk-driven OTAs
(2019-09-01)
Jaikla, W.
;
Talabthong, Pruedchawat
;
Siripongdee, Surapong
;
Supavarasuwat, Piya
;
Suwanjan, Peerawut
In this paper, a new versatile voltage mode first order filter using low-voltage low-power bulk-driven OTAs is presented. The proposed filter with two high impedance input-voltage nodes and single output-voltage node consists of two OTAs, one grounded capacitor and one grounded resistor. Three filtering responses, low-pass (LP), high-pass (HP) and all-pass (AP) are obtained by appropriately applying the input signal into the input nodes. The natural frequency (ω<inf>0</inf>) can be electronically tuned by the bias current. In case of all-pass filter, its phase response is electronically controlled by adjusting only single bias current. With this feature, it doesn't need to simultaneously change two bias currents or two passive element values. The performances of the proposed filter were evaluated via PSPICE simulations using CMOS 0.18 μm TSMC technology parameters (level 7) with ±0.4 V supply voltages. The proposed filter consumes 47.2 μW. To obtain the actual testing results, the proposed filter was also experimented using commercially available IC, LM13700. Moreover, the three phases sinusoidal oscillator based on proposed first order high-pass filter was designed and investigated by PSPICE simulation and experiment.

Jaikla, Winai

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