Wisayataksin, Sumek

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Wisayataksin, Sumek
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sumek.wi@kmitl.ac.th

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    Data Modulation Technique Using Concentration of Odor Molecules
    (2018-12-26)
    Ariyakul, Yossiri
    ;
    Wisayataksin, Sumek
    This study proposed a novel data modulation technique for digital communication by using a concentration of odor molecules. The information is encapsulated in an odor with controlled concentration levels in accordance with the binary representation of the message by using an olfactory display. The released odor is then measured by an odor sensing system where it is converted into electrical form that can be demodulated into the original data by using a digital filter and decision decoder. The experiments of sending a message by mean of odor in the UART format were performed to evaluate the possibility of the proposed molecular communication approach. The results reveal that the shape of signals detected by the odor sensor is associated with the information in the message, which confirms the reliability of data communication using this method.
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    An efficient hardware architecture of Codec2 low bit-rate speech decoder
    (2019-07-01)
    Wisayataksin, Sumek
    Speech coding algorithms have been developed for years to digitalize human voice to a few binary bits as possible while maintaining reasonable quality. Codec2 vocoder algorithm is one of an efficient sinusoidal coding with very high compression rate down to 450 bit/s. In this paper, an efficient hardware architecture of Codec2 decoder is proposed to increase the performance of voice decoding process and reduce comprehensive tasks from a host processor. Although the sinusoidal decoding algorithm is complicated with many arithmetic operations such as the arithmetic of complex numbers, FFT, FIR filter, division, trigonometry, exponential and logarithm functions, several techniques were explored to optimize and parallelize a datapath of the proposed hardware. The implementation on Xilinx Artix-7 FPGA revealed that the proposed architecture could reduce the processing time up to 20 times, compared to the conventional Cortex-M4 CPU running with the original software.
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    4-ary Odor-Shift Keying Using Multi-channel Olfactory Display
    (2019-10-01)
    Wisayataksin, Sumek
    ;
    Angkasuwan, Panupong
    ;
    Ariyakul, Yossiri
    Odor-shift keying, a data modulation technique that encodes digital data by varying odor presentation, was proposed in this paper. A multi-channel olfactory display was used as modulator to release multiple odors whose blending ratio representing different digital data. On the demodulator side, an odor sensing system is used to measure the released smells, revert them into electrical form which is then decoded into the original data by using digital signal processing. The proposed technique can enhance data transfer rate of the communication through odor as carrier. A preliminary experiment was conducted to validate the possibility of the concept of varying the presented odors to represent different binary data. Finally, a string was practically modulated and transmitted by using the proposed technique. The demodulation process can be performed successfully and the data transfer rate was doubled from the previous work.
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    A programmable artificial neural network coprocessor for handwritten digit recognition
    (2019-07-01)
    Wisayataksin, Sumek
    ;
    Boonyuu, Geranun
    This paper proposes the hardware architecture of an artificial neural network coprocessor that its structure can be programmable. The number of neurons in each layer of a feedforward network can be set by writing configuration registers. The processing unit with four MACs and the sigmoid calculation engine are connected in eight pipeline stages to enhance the processing speed. The application of handwritten digit recognition from the MNIST database was performed to verify the performance of proposed architecture. The design was developed with Verilog HDL and implemented on the Xilinx Artix-7 XC7A35T FPGA. The experimental results revealed that the speed of back-propagation learning and validation process can be up to 47 times faster than computation on ARM Cortex-A4 CPU, while the recognition rate is still the same.