Moungnoul, Phichet
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Preferred name
Moungnoul, Phichet
Alternative Name
Moungnoul, P.
Main Affiliation
Email
phichet.mo@kmitl.ac.th
15 results
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Item type:Publication, OTA-Based high frequency CMOS multiplier and squaring circuit(2009-01-01); Miyanaga, YoshikazuA gigahertz analog multiplier based on OTA and squaring is proposed. The multipliehas gigahertz frequency response is suitable to use in communication system. The circuitisbased on 0.18 pm CMOS technology simulated using PSPICE level 7. This technique provides;wide dynamic range, GHz-bandwidth response and low power consumption. The proposed circuithas been simulated with PSPICE and achieved -3dB bandwidth of 3.96GHz. The total power dissipation is 0.588mW with ±1V power supply voltages. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Throughput performance of modified inhibit sense multiple access protocol in packet satellite system(2007-12-01); Tran, Tuan HungIn this paper presented and evaluated the packet satellite channel performance of the modified Inhibit Sense Multiple Access (ISMA) Protocol in a Low Earth Orbit (LEO) satellite system. Results show that the effect of propagation delay on the throughput performance of the uplink in the satellite systems can be reduced by using the timing advance for the idle signal in ISMA protocol. It is also proved that the throughput of modified ISMA protocol can be substantially better than that is on the ALOHA protocol. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Routing optimization of telephone network by Hopfield Net(2005-12-01); - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A 0.18 μm CMOS Gaussian monocycle pulse circuit design for UWB(2006-12-01); Miyanaga, YohikazuThis paper proposes a new method of monocycle pulse generation by generating the Gaussian pulse, and generate first derivative of the pulse to get a Scholtz's monocycle pulse. The simulation result of the generation is based on 0.18 μn CMOS technology which achieved using HSPICE (Level 49). The Gaussian pulse is generated by using CMOS inverter of which is applied the delay time to perform the Gaussian pulse. ©2006 IEEE. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Comparison between measurement and prediction propagation model for PCT system(2005-12-01); - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Effect of cell coverage adjustment for TD-SCDMA uplink channel(2006-12-01) - Some of the metrics are blocked by yourconsent settings
Item type:Publication, GSM traffic forecast by combining forecasting technique(2005-12-01); - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Investigation of multi-linear chirp FH-CDMA over fading channel model(2005-12-01); - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A GHz simple CMOS squarer circuit(2008-12-01); Miyanaga, YoshikazuA simple CMOS squarer circuit is proposed. The circuit has a Giga Hertz frequency response that has advantages to be used in communication systems. The proposed circuit focuses on the extension to ultra wide bandwidth. The circuit is based on 0.18 urn CMOS technology simulated using PSPICE level 7. The circuit has wide dynamic range, GHz-bandwidth response and low power consumption. The proposed circuit has been simulated with SPICE and achieved -3dB bandwidth of 10.96GHz. The power consumption is about 86.5uW with a ±1V power supply voltage. Simulation result shows that the proposed squarer can accommodate the whole UWB bandwidth. © 2008 IEEE. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Current-mode universal filter using translinear current conveyors(2008-10-06); ;