Sooksood, Kriangkrai

Preferred name

Alternative Name

Sooksood, K.

Main Affiliation

School of Engineering

kriangkrai.so@kmitl.ac.th

Now showing 1 - 9 of 9

Some of the metrics are blocked by your
consent settings
Distributed clock gating for power reduction of a programmable waveform generator for neural stimulation
(2012-12-14)
Noorsal, Emilia
;
Sooksood, Kriangkrai
;
Bihr, Ulrich
;
Becker, Joachim
;
Ortmanns, Maurits
This paper describes how to employ distributed clock gating to achieve an overall low power design of a programmable waveform generator intended for a neural stimulator. The power efficiency is enabled using global timing control combined with local amplitude distribution over a bus to the local stimulator frontends. This allows the combination of local and global clock gating for complete sub-blocks of the design. A counter and a shifter employed at the local digital stimulator reduce the design complexity for the waveform generation and thus the overall power consumptions. The average power results indicate that 63% power can be saved for the global stimulator control unit and 89-96% power can be saved for the local digital stimulator by using the proposed approach. The circuit has been implemented and successfully tested in a 0.35 μm AMS HVCMOS technology. © 2012 IEEE.
Some of the metrics are blocked by your
consent settings
A multichannel neurostimulator with transcutaneous closed-loop power control and self-adaptive supply
(2012-12-14)
Xu, Hongcheng
;
Noorsal, Emilia
;
Sooksood, Kriangkrai
;
Becker, Joachim
;
Ortmanns, Maurits
This paper presents an integrated multichannel neurostimulator ASIC with improved power management efficiency. The stimulator features transcutaneous closed-loop power control that enables optimum power transfer in spite of the coupling variation as well as the variation in the stimulation threshold/current. A programmable adaptive supply in the high voltage (HV) domain is further proposed to minimize the power dissipation during the active stimulation mode in terms of stimulus current/electrode impedance inconsistencies. The stimulator prototype, including the power management, the digital control as well as a 16 channel stimulation frontend, is fabricated in AMS 0.35μm HV CMOS technology. In measurements, automatic supply voltage adaptation from 13.1V to 8V with running stimulations has been achieved, resulting in maximum power saving of 40% for the implantable circuit. © 2012 IEEE.
Some of the metrics are blocked by your
consent settings
Multistimulator backchannel communication link implemented for safety information and closed-loop power management
(2014-03-30)
Noorsal, Emilia
;
Sooksood, Kriangkrai
;
Xu, Hongcheng
;
Sukumaran, Deepti
;
Ortmanns, Maurits
This paper describes the importance of having a backchannel communication link between a microstimulator ASIC and an external control unit for complete safety closure and closed-loop power management. An example of the overall microstimulation system with backchannel communication link for an epiretinal implant is provided. Additionally, the backchannel operation and protocol between the implant chip and the external control unit are given. The flexible multichannel stimulator was implemented and successfully tested in a 0.35 μm AMS HVCMOS technology. A test measurement setup is developed to test the functionality of bidirectional communication between the fabricated stimulator ASIC and the external control unit. Conducted measurement results on erroneous data packet, non-accomplished charge balancing and supply voltage adaptation validate the functionality of the bidirectional communication system.
Some of the metrics are blocked by your
consent settings
Wide current range and high compliance-voltage bulk-driven current mirrors: Simple and cascode
(2017-01-03)
Sooksood, Kriangkrai
This paper presents novel bulk-driven current mirror and bulk-driven cascode current mirror. Bulk-driven technique is employed to overcome a threshold voltage limitation. High accuracy transfer characteristic over wide current range is achieved through a negative feedback. The proposed circuits are designed and simulated with a 0.18 μm CMOS technology. They operate at 1 V power supply. The simulation results show the headroom voltage of 0.11 V and 0.16 V for the proposed bulk driven current mirror and bulk driven cascode current mirror, respectively.
Some of the metrics are blocked by your
consent settings
A Low Dropout Voltage Regulated Bulk-driven CMOS Current Mirror
(2016-01-01)
Minwong, Nutthawut
;
Sooksood, Kriangkrai
;
Thanachayanont, Apinunt
Novel bulk-driven current mirror (CM) and bulk-driven cascode CM are presented in this paper. Bulk-driven technique is employed to overcome a threshold voltage limitation. Proposed circuits operate at 1 V power supply. By using a negative feedback, high accuracy input and output transfer characteristic over wide current range is achieved. The proposed circuits are simulated using a 0.18 μm CMOS technology. The headroom voltage is 0.11 V for the proposed bulk driven CM and 0.16 V for the proposed bulk driven cascode CM.
Some of the metrics are blocked by your
consent settings
Power efficient output stages for high density implantable stimulators - Review and outlook
(2012-10-02)
Sooksood, Kriangkrai
;
Ortmanns, Maurits
In implantable stimulators, a current-controlled stimulation is preferred over a voltage-controlled due to its safety. However, the power efficiency is a major disadvantage. By reducing the headroom voltage needed in the current driver, power efficiency of a constant current stimulation is improved. A promising technique is to bias the transistor in triode region whereas improving output impedance through the regulated cascode structure. This comes with a feature of implicit compliance monitor. This paper presents an overview on recent highly compliance output drivers and proposes a new power efficient high compliance output stage. © 2012 IEEE.
Some of the metrics are blocked by your
consent settings
Power efficient output stage for high density implantable stimulators
(2012-05-10)
Sooksood, K.
;
Ortmanns, M.
In implantable stimulators, a current-controlled stimulation is preferred over a voltage-controlled one due to its safety. However, the power efficiency is a major disadvantage. By reducing the headroom voltage needed in the current driver, power efficiency of a constant current stimulation is improved. A promising technique is to bias the transistor in the triode region whereby improving output impedance through the regulated cascode structure. This comes with a feature of an implicit compliance monitor. Proposed is a new power efficient high compliance output stage. © 2012 The Institution of Engineering and Technology.
Some of the metrics are blocked by your
consent settings
Recent advances in power efficient output stage for high density implantable stimulators
(2012-12-14)
Sooksood, Kriangkrai
;
Noorsal, Emilia
;
Bihr, Ulrich
;
Ortmanns, Maurits
A major drawback of a current-controlled stimulation is its power efficiency. However, it is commonly used in implantable stimulators due to its safety. The power efficiency of a current-controlled stimulation can be improved by reducing the headroom voltage needed in the current driver. A promising technique is to bias the transistor in triode region whereas improving output impedance through the regulated cascode structure. This comes with a feature of implicit compliance monitor which is used for the supply voltage adaptation. This paper presents an overview on recent power efficient high voltage-compliance output drivers. © 2012 IEEE.
Some of the metrics are blocked by your
consent settings
An instrumentation amplifier based on a floating gate fully differential CCII with DEO rejection for ECG acquisition systems
(2014-01-01)
Kongpoon, Metha
;
Leelavattananon, Kritsapon
;
Sooksood, Kriangkrai
This paper presents a low power, high linearity and high CMRR instrumentation amplifier (IA) based on a multiple-input floating gate fully differential second-generation current conveyor (FGFDCCH) for ECG acquisition systems. The proposed IA is included with the low power lossless integrator for the differential electrode offset (DEO) rejection. The proposed IA is designed and simulated with the AMS 0.35μm CMOS process. The simulation results exhibit CMRR of 117dB@50Hz, 0.16%THD@10Hz and 5mV<inf>pp</inf> input, and a DEO rejection capability up to ±200mV while consumes a supply current of 13μA with a 3V(±1.5V) supply voltage.

Sooksood, Kriangkrai

Filters

Settings

Sort By

Results per page