Kumngern, Montree
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Preferred name
Kumngern, Montree
Alternative Name
KUMNGERN, Montree
Kumngern, M.
Main Affiliation
Email
montree.ku@kmitl.ac.th
81 results
Now showing 1 - 10 of 81
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Item type:Publication, 0.3-V Voltage-Mode Versatile First-Order Analog Filter Using Multiple-Input DDTAs(2023-07-01); ;Khateb, Fabian ;Kulej, TomaszSteffan, PavelThis paper presents a versatile first-order analog filter using differential difference transconductance amplifiers (DDTAs). The DDTA employs the bulk-driven (BD) multiple-input MOS transistors technique (MI-MOST) operating in the subthreshold region. This results in low-voltage and low-power operational capability. Therefore, the DDTA, designed using 130 nm CMOS technology from UMC in the Cadence environment, operates with 0.3 V and consumes 357.4 nW. Unlike previous works, the proposed versatile first-order analog filter provides first-order transfer functions of low-pass, high-pass, and all-pass filters within a single topology. The non-inverting, inverting, and voltage gain of the transfer functions are available for all filters. Furthermore, the proposed structure provides high-input and low-output impedance, which is required for voltage-mode circuits. The pole frequency and voltage gain of the filters can be electronically controlled. The total harmonic distortion of the low-pass filter was calculated as −39.97 dB with an applied sine wave input signal of 50 mV<inf>pp</inf>@ 50 Hz. The proposed filter has been used to realize a quadrature oscillator to confirm the advantages of the new structure. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Current-Mode Active Filter Using EX-CCCII(2024-06-01); ;Khateb, Fabian ;Kulej, TomaszThis paper presents a novel multiple-input and multiple-output current-mode universal analog filter with electronic tuning capability. The proposed circuit uses a single second-generation current-controlled current conveyor with extra-X terminals (EX-CCCII) and two grounded capacitors. The filter can offer five standard filtering functions, namely low-pass, high-pass, band-pass, band-stop, all-pass responses, in the same circuit without changing the internal configuration of the filter by selecting appropriate input and output signals. To obtain the five standard filtering functions, inverted input signal and input matching conditions are absent. The natural frequency of all filter responses can be electronically controlled. The proposed circuit was simulated by SPICE using 0.18 μm CMOS process from Taiwan Semiconductor Manufacturing Company (TSMC). The results of experiments using the integrated circuit operational amplifier AD844 confirm the functionality of the new filter. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, 1 V Electronically Tunable Differential Difference Current Conveyors Using Multiple-Input Operational Transconductance Amplifiers(2024-03-01); ;Khateb, Fabian ;Kulej, TomaszLanghammer, LukasThis paper presents electronically tunable current conveyors using low-voltage, low-power, multiple-input operational transconductance amplifiers (MI-OTAs). The MI-OTA is realized using the multiple-input bulk-driven Metal Oxide Semiconductor transistor (MIBD-MOST) technique to achieve minimum power consumption. The MI-OTA also features high linearity, a wide input range, and a simple Complementary Metal Oxide Semiconductor (CMOS). Thus, high-performance electronically tunable current conveyors are obtained. With the MI-OTA-based current conveyor, both an electronically tunable differential difference current conveyor (EDDCC) and a second-generation electronically tunable current conveyor (ECCII) are available. Unlike the conventional differential difference current conveyor (DDCC) and second-generation current conveyor (CCII), the current gains of the EDDCC and ECCII can be controlled by adjusting the transconductance ratio of the current conveyors. The proposed EDDCC has been used to realize a voltage-to-current converter and current-mode universal filter to show the advantages of the current gain of the EDDCC. The proposed current conveyors and their applications are designed and simulated in the Cadence environment using 0.18 μm TSMC (Taiwan Semiconductor Manufacturing Company) CMOS technology. The proposed circuit uses ±0.5 V of power supply and consumes 90 μW of power. The simulation results are presented and confirm the functionality of the proposed circuit and the filter application. Furthermore, the experimental measurement of the EDDCC implemented in the form of a breadboard connection using a commercially available LM13700 device is presented. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, 0.5-V High Linear Fully Differential Multiple-Input Bulk-Driven OTA With Effective Self-Embedded CMFB(2024-01-01) ;Khateb, Fabian ;Kulej, Tomasz; This paper presents a new fully differential multiple-input operational transconductance amplifier (FD MI-OTA) with an effective self-embedded common-mode feedback circuit (CMFB). The circuit employs several design techniques to extend the linearity to the rail-to-rail level, such as a bulk-driven, multiple-input capacitive voltage divider and source degeneration. The circuit uses self-cascode transistors to increase the gain of the OTA from one side and to create a common-mode feedback circuit, needed to control the common-mode output voltage from the other side. Thus, the CMFB is part of the OTA and as a result, its chip area and power consumption remain unchanged. The performance of the proposed circuit was simulated using TSMC s CMOS 0.18 μ m process in the Cadence Virtuoso System Design Platform to validate the performance of the topology. Intensive simulation results based on Monte Carlo and process, voltage, temperature corners were performed to confirm the OTA's performance and the robustness of the CMFB. The circuit operates with a supply voltage of 0.5 V and consumes 17.5nW of power, making it suitable for applications with extremely low voltage supply and low frequency. As an application, a second-order low-pass filter was designed based on the proposed FD MI-OTA. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, 0.5-V 281-nW Versatile Mixed-Mode Filter Using Multiple-Input/Output Differential Difference Transconductance Amplifiers(2024-01-01) ;Khateb, Fabian; Kulej, TomaszThis paper presents a new low-voltage versatile mixed-mode filter which uses a multiple-input/output differential difference transconductance amplifier (MIMO-DDTA). The multiple-input of the DDTA is realized using a multiple-input bulk-driven MOS transistor (MI-BD-MOST) technique to maintain a single differential pair, thereby achieving simple structure with minimal power consumption. In a single topology, the proposed filter can provide five standard filtering functions (low-pass, high-pass, band-pass, band-stop, and all-pass) in four modes: voltage (VM), current (CM), transadmittance (TAM), and transimpedance (TIM). This provides the full capability of a mixed-mode filter (i.e., twenty filter functions). Moreover, the VM filter offers high-input and low-output impedances and the CM filter offers high-output impedance; therefore, no buffer circuit is needed. The natural frequency of all filtering functions can be electronically controlled by a setting current. The voltage supply is 0.5 V and for a 4 nA setting current, the power consumption of the filter was 281 nW. The filter is suitable for low-frequency biomedical and sensor applications that require extremely low supply voltages and nano-watt power consumption. For the VM low-pass filter, the dynamic range was 58.23 dB @ 1% total harmonic distortion. The proposed filter was designed and simulated in the Cadence Virtuoso System Design Platform using the 0.18 µm TSMC CMOS technology. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A 500-mV, 124.11-nW first-order universal shadow filter based on multiple-input DDTAs(2026-07-01); ;Khateb, Fabian ;Kulej, Tomasz ;Thanyaratsakul, NattapongArbet, DanielThis paper proposes a novel first-order multifunction filter capable of simultaneously realizing non-inverting and inverting low-pass, high-pass, and all-pass filter responses using multiple-input differential difference transconductance amplifiers (MI-DDTAs). The design leverages the shadow filter technique, enabling electronic tuning of the pole frequency across all filter responses through an external voltage-controlled amplifier. This approach offers enhanced flexibility and reconfigurability, making it highly attractive for adaptive analog signal processing. The MI-DDTA core is implemented using a multiple-input bulk-driven MOS transistor architecture, optimized for ultra-low-voltage and ultra-low-power operation. Designed in Cadence Virtuoso using the 65 nm TSMC CMOS (1P9M) process, the proposed MI-DDTA occupies a compact silicon area of 171 μm × 119 μm. Operating from a 500 mV supply, the shadow filter achieves a dynamic range of 55.9 dB for a 200 mV<inf>pp</inf> input signal, with total harmonic distortion limited to 1%. Owing to its exceptionally low bias currents, the shadow filter exhibits a total power consumption of only 124.11 nW, making it well suited for energy-constrained biomedical and IoT sensor applications, where low-frequency signal processing, compact implementation, and high energy efficiency are essential. To validate the proposed concept, a discrete prototype was also developed using MI-DDTA configurations built with LM13700 operational transconductance amplifiers. The experimental results confirm the expected filter behavior and demonstrate the feasibility of the proposed design in practical scenarios. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Sub-volt fully balanced differential difference amplifier(2015-01-01) ;Khateb, Fabian; ;Vlassis, Spyridon ;Psychalinos, CostasKulej, TomaszThis paper presents a new CMOS structure for a fully balanced differential difference amplifier (FB-DDA) designed to operate from a sub-volt supply. This structure employs the bulk-driven quasi-floating-gate (BD-QFG) technique to achieve the capability of an ultra-low voltage operation and an extended input voltage range. The proposed BD-QFG FB-DDA is suitable for ultra-low-voltage low-power applications. The circuit is designed with a single supply of 0.5 V and consumes only 357 nW of power. The proposed circuit was simulated in a 0.18-μm TSMC CMOS technology and the simulation results prove its functionality and attractive parameters. An application example of a state variable filter is also presented to confirm the usefulness of the proposed BD-QFG FB-DDA. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Low-Voltage Diode-Less Rectifier Based on Fully Differential Difference Transconductance Amplifier(2017-11-01) ;Khateb, Fabian ;Kulej, Tomasz; Kledrowetz, VilémThis paper presents a voltage-mode low-voltage low-power diode-less rectifier with only one active element, the fully differential difference transconductance amplifier (FDDTA). The multiple-input floating-gate MOS (FG-MOS) transistor is used to build the differential pairs of the FDDTA resulting in the reduced count of transistors, circuit simplicity and the capability to work under low-voltage supply with extended input voltage range. The rectifier was designed with 0.9V voltage supply and 8μW power consumption, hence it is suitable for wearable electronics and biomedical applications. The simulation results obtained from the Cadence platform using 0.18μm TSMC CMOS technology show good performances for the designed circuit. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, 1.2 V Differential Difference Transconductance Amplifier and Its Application in Mixed-Mode Universal Filter(2022-05-01); ;Suksaibul, Pichai ;Khateb, FabianKulej, TomaszThis paper presents a new mixed-mode universal filter based on a differential difference transconductance amplifier (DDTA). Unlike the conventional transconductance amplifier (TA), this DDTA has both advantages of the TA and the differential difference amplifier (DDA). The proposed filter can offer four-mode operations of second-order transfer functions into a single topology, namely, voltage-mode (VM), current-mode (CM), transadmittance-mode (TAM), and transimpedance-mode (TIM) transfer functions. Each operation mode offers five standard filtering responses; therefore, at least twenty filtering transfer functions can be obtained. For the filtering transfer functions, the matching conditions for the input and passive component are absent. The natural frequency and the quality factor can be set orthogonally and electronically controlled. The performance of the proposed topology was evaluated by PSPICE simulator using the 0.18 µm CMOS technology from the Taiwan Semiconductor Manufacturing Company (TSMC). The voltage supply was 1.2 V and the power dissipation of the DDTA was 66 µW. The workability of the filter was confirmed through experimental test by DDTA-based LM13600 discrete-component integrated circuits. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Comparative performance study of multiple-input bulk-driven and multiple-input bulk-driven quasi-floating-gate DDCCs(2019-08-01) ;Khateb, Fabian ;Kulej, Tomasz; ; Ranjan, Rajeev KumarThis brief presents a comparative performance study of two recently presented techniques, the multiple-input bulk-driven (MI-BD) and the multiple-input bulk-driven quasi-floating-gate (MI-BD-QFG) MOS transistors (MOST). These techniques offer simplified CMOS structures of specific active elements and ensure near rail-to-rail operation capability under extremely low-voltage supply and reduced power consumption. However, to clarify the pros and cons of each technique, two Differential Difference Current Conveyors (DDCC) using MI-BD and MI-BD-QFG are compared. For the purpose of comparison, theoretical analysis such as small-signal model, open-loop gain, terminal resistances, gain bandwidth product, input referred thermal noise and maximum input range of the DDCCs are included. Furthermore, in order to provide a fair performance comparison both of the DDCCs is supplied with 0.4 V and consume same power 140 nW. The DDCCs were fabricated in a standard n-well 0.18 µm CMOS process from TSMC and hence the results are confirmed theoretically and experimentally.
