Kasemsuwan, Varakorn

Preferred name

Alternative Name

Kasemsuwan, V.

Kasemsuwan, Varakom

Main Affiliation

School of Engineering

varakorn.ka@kmitl.ac.th

Now showing 1 - 10 of 15

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Low-voltage bulk-driven QFG-regulated self-cascode super MOS transistor
(2016-09-06)
Thongleam, Thawatchai
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Suadet, Apirak
;
Kasemsuwan, Varakorn
A bulk-driven super MOS transistor (BD-SMT) for low voltage operation is presented. The proposed transistor achieves a high effective transconductance (G<inf>m(eff)</inf>), high effective drain impedance (R<inf>D(eff)</inf>) and low effective source impedance (R<inf>S(eff)</inf>). BD-SMT is designed based on regulated self-cascode and negative feedback techniques. The transistor been designed using a 0.18 μm CMOS technology and operated from a 0.4 V supply with a static power consumption of 12 μW. The simulation results showed higher G<inf>m(eff)</inf>, larger R<inf>D(eff)</inf> and smaller R<inf>S(eff)</inf> as compared to those of simple bulk-driven MOS transistor.
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A current-mode common-mode feedback circuit (CMFB) with rail-to-rail operation
(2011-06-13)
Suadet, Apirak
;
Kasemsuwan, Varakorn
This paper presents a current-mode commonmode feedback (CMFB) circuit with rail-to-rail operation. The CMFB is a stand-alone circuit, which can be connected to any low voltage transconductor without changing or upsetting the existing circuit. The proposed CMFB employs current mirrors, operating as common-mode detector and current amplifier to enhance the loop gain of the CMFB. The circuit employs positive feedback to enhance the output impedance and gain. The circuit has been designed using a 0.18 μm CMOS technology under 1 V supply and analyzed using HSPICE with BSIM3V3 device models. A pseudodifferential amplifier using two common sources and the proposed CMFB shows rail to rail output swing (± 0.7 V) with low common-mode gain (-36 dB) and power dissipation of 390 μW. Copyright © 2011 De Gruyter.
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A 0.5 volt rail-to-rail CMOS pseudo-differential OTA using simple feed-forward technique
(2011-08-12)
Suadet, Apirak
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Thongleam, Thawatchai
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Kasemsuwan, Varakorn
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Vichienchom, Kasin
This paper presents a low voltage CMOS pseudo differential OTA using simple feed-forward technique. The circuit employs feed-forward technique to suppress the common-mode gain, and positive feedback to enhance the output impedance. The circuit is designed using 0.18 μm CMOS technology under 0.5 V supply. The simulation results show rail-to-rail input/output swing, achieved with low common-mode gain (-35 dB). The output swing of the circuit is 0.3 Vpp. The power dissipation of the circuit is 50 μW. © 2011 IEEE.
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Low voltage adjustable CMOS Schmitt trigger
(2011-07-01)
Singhanath, Pratchayaporn
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Suadet, Apirak
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Kanjanop, Arnon
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Thongleam, Thawatchai
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Kuankid, Sanya
This paper presents a low voltage adjustable CMOS Schmitt trigger using dynamic threshold MOS (DTMOS). Cross-coupled inverter with body control is employed to speed up the switching process, and control the intensity of the feedback. The proposed Schmitt trigger has been designed using 0.18 m 0.4 V CMOS technology and analyzed using PSPICE with BSIM3V3 device models. The simulation results show rail-to-rail operation and independently adjustable switching voltages for both low-to-high (V<inf>T(LH)</inf>) and high-to-low (V <inf>T(HL)</inf>) as high as 15 % of the supply voltage. The power dissipation is 0.13 W. © 2011 IEEE.
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A CMOS inverter-based class-AB pseudo differential amplifier for HF applications
(2010-12-01)
Suadet, Apirak
;
Kasemsuwan, Varakorn
This paper presents a CMOS inverter-based class-AB pseudo differential amplifier for HF applications using new simple rail-to-rail CMFB circuit. The proposed circuit employs two CMOS inverters and the complementary common-mode feedback (CMFB) consisting of current mode common-mode detector and transimpedance amplifiers. The circuit has been designed using 0.18 μm CMOS technology under 1 V supply, and the simulation results shows that the rail to rail output swing is achieved with low common-mode gain (-15 dB). The output swing of the circuit is 0.7 V. The power dissipation of the circuit is 96 μW. © 2010 IEEE.
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A 1 volt CMOS pseudo differential amplifier
(2006-01-01)
Suadet, Apirak
;
Kasemsuwan, Varakorn
This paper presents a 1 V CMOS pseudo differential amplifier using simple rail-to-rail CMFB circuit. The proposed circuit employs the complementary common mode feedback (CMFB) consisting of common mode detector, transimpedance and transconductance amplifiers. The simulation results using HSPICE under a 0.18 μm CMOS technology shows that the rail to rail output swing is achieved with low common mode gain (-36 dB). The differential output swing of the circuit is ± 0.7 V. The power dissipation of the circuit is 0.23 mW. © 2006 IEEE.
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A 0.8 V quasi-floating-gate fully differential CMOS op-amp with positive feedback
(2011-08-12)
Thongleam, Thawatchai
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Suadet, Apirak
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Kasemsuwan, Varakorn
This paper presents a 0.8 V fully differential CMOS op-amp. The input stage of the circuit is designed using quasi-floating-gate (QFG) transistors with positive feedback, while QFG transistors in the output stage are connected in the class AB configuration. QFG transistors are employed, enabling the circuit to operate under low supply voltage. The proposed amplifier is designed using 0.18 μm CMOS technology, and simulation results show rail-to-rail input and output swings. The open-loop gain is 80.4 dB with the gain-bandwidth product of 8.66 MHz. Phase margin is 45° (C<inf>L</inf>= 20 pF). The CMRR is 107 dB (at 1 kHz) and the power consumption is 54.9 μW. © 2011 IEEE.
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A simple rail-to-rail CMOS voltage follower
(2006-01-01)
Wongfoo, Surat
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Naklo, Weerachai
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Suadet, Apirak
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Kasemsuwan, Varakorn
A simple rail-to-rail CMOS voltage follower is presented. The proposed circuit is developed based on a conventional class AB voltage follower. The circuit is designed using a 0.5 μm CMOS technology and HSPICE is used to verify the circuit performance. The circuit operates under the supply of ± 1.5 V. The voltage follower can drive ± 1.25 V to the 250 Ω with the total harmonic distortion of less than 0.25 % at the operating frequency of 10 KHz. The power dissipation is 3.03 mW © 2006 IEEE.
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A 0.8 v class-AB linear OTA using DTMOS for high-frequency applications
(2011-07-01)
Suadet, Apirak
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Thongleam, Thawatchai
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Kanjanop, Arnon
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Singhanath, Pratchayaporn
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Hirunsing, Buncha
This paper presents a 0.8 V class-AB linear operational transconductance amplifier (OTA) using DTMOS for high-frequency applications. The circuit employs positive feedback to enhance the input impedance, and feed-forward technique to suppress the common-mode gain. The circuit is designed using 0.18 μm CMOS technology under 0.8 V supply. The simulation results show rail-to-rail input/output swing, suppressed common-mode response, and good linearity (less than -48 dB with input 0.6 V<inf>pp</inf>, 5 MHz). The power dissipation is 155 μW. © 2011 IEEE.
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A 1.0 volt thermal noise-canceling CMOS ransimpedance-based amplifier
(2008-12-01)
Wangtaphan, Skawrat
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Suadet, Apirak
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Meksiri, Sukarasut
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Kasemsuwan, Varakorn
This paper presents a design of 1.0 V thermal noise-canceling amplifier using 0.13μm CMOS technology. The amplifier consists of a CMOS inverter-based transimpedance amplifier, and a noise-canceling circuitry. The thermal noise-canceling circuitry is very simple, and consists of only two CMOS inverters. The simulation result shows the input referred noise of the proposed amplifier is 3 nV/√Hz, which is 21 percent less than that of the transimpedance amplifier. The bandwidth of the circuit (ω<inf>-3dB</inf>) is 1 GHz, and the power dissipation is 163 μW. ©2008 IEEE.

Kasemsuwan, Varakorn

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