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    Item type:Publication,
    Single low-supply and low-distortion CMOS Analog Multiplier
    (2005-12-01) ;
    Somdunyakanok, Montri
    ;
    Angkaew, Krit
    ;
    Jodtang, Arkhom
    ;
    Dejhan, Kobchai
    A single low-supply CMOS Analog Multiplier based upon ohmic region of MOS transistors is presented. This paper describes a method to force the drain-source voltage (V<inf>DS</inf>) of MOS transistors to operate in ohmic region. The achieved circuit can be used a single low-power supply. The complete circuit contains 20 transistors and 8 current sources using a low-power supply +1.5 volts. This circuit has high performance with very high-linearity and low-distortion. The achieved input dynamic range operation is ±400mV, the linearity error is smaller than 0.1% and total harmonic distortion is smaller than 0.25% for input range 800mVp-p. © 2005 IEEE.
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    Item type:Publication,
    A CMOS voltage-controlled floating resistance circuit with temperature compensated
    (2005-12-01) ;
    Somdunyakanok, Montri
    ;
    Khaw-Ngam, Khachen
    ;
    Dejhan, Kobchai
    A CMOS Voltage-Controlled Floating Resistance (VCFR) with a new approach for non-linearity terms cancellation and temperature compensated technique is presented. The achieved circuit uses 17 MOS transistors that operated in ohmic region and saturation region. It consists of the voltage attenuator, voltage subtraction and voltage inverting circuits. These circuits performed as a voltage dependent source that bias to an ohmic transistor. The nonlinearity terms and threshold voltage are cancelled in order to a linearity and temperature effect minimization. A first-order low-pass filter with tunable a cut-off frequency is proposed as an application for confirmed a realistic VCFR. The characteristics are including a high linearity and the temperature compensation. The results are carried out by PSpice. © 2005 IEEE.