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    The effects of geometrical capacitance components of LOCOS diode in VLSI
    (2019-03-01)
    Nissai, Itsariya
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    Ruangphanit, Anucha
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    ;
    The effects of geometrical capacitance components of LOCal Oxidation of Silicon (LOCOS) diode in Very Large Scale Integrated circuit (VLSI) are proposed. For the correct circuit model simulation, the model of the device must be accurate and consistence with the SPICE models. The rectangular structure (L=400 μm, W=200 μm), the multi-fringe structure 1 (L=400 μm, W=4 μm, no. strips =50) and the multi-fringe structure 2 (L= S μm, W= Sμm, no. sample =1200) have been designed. These extraction methodologies show the area capacitance component, the peripheral capacitance component and the corner capacitance component at the field oxide side. The BSIM 3v3 junction capacitance models are proposed also. The comparison is made to check the accuracy of the parameter models. The results showed a low level error.
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    The diamond crystal nucieation by combustion activation CVD
    (2008-12-01) ; ;
    Sato, K.
    This paper presents the diamond nucleation using combustion activation chemical vapor deposition (CACVD) by 0.95 volumetric ratio of O <sup>2</sup>/C<sup>2</sup>H<sup>2</sup> under atmospheric pressure. The main point of our work is to develop the CACVD technique for synthesize the semiconductor materials, which is developed for electronic devices application. The surface nucleation of substrate was studied by using surface pretreatment. The results of surface nucieation on mirror-silicon, polished silicon by diamond powder, silicon-dioxide (Sio<inf>2</inf>), and polished Sio<inf>2</inf> by diamond powder, are significantly different. It can be concluded that the silicon-dioxide mask technique is useful for nucleated diamond protection whereas the polished silicon by diamond powder is suitable for nucleated diamond generation. These techniques are applied for the pattern fabrication. © 2008 Trans Tech Publications, Switzerland.
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    Electrical properties of bismuth potassium titanate-strontium titanate ferroelectric ceramics
    (2010-07-30)
    Phetnoi, Prapapim
    ;
    Niemcharoen, Surasak
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    ;
    Sutapun, Manoon
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    In this paper, lead-free (Bi<inf>0.5</inf>K<inf>0.5</inf>)TiO<inf>3</inf> ceramics doped with SrTiO<inf>3</inf> was prepared by the conventional solid state reaction method with sintering temperature at 1040°C. The samples were characterized by X-ray diffraction analysis and Scanning Electron Microscopy. The dielectric, ferroelectric properties were also investigated. The results of X-ray diffraction reveal that SrTiO<inf>3</inf> diffuse into the Bi <inf>0.5</inf>K<inf>0.5</inf>TiO<inf>3</inf> lattices to form a solid solution with a pure perovskite structure. After the introduction of SrTiO<inf>3</inf> into Bi<inf>0.5</inf>K<inf>0.5</inf>TiO<inf>3</inf>, the dielectric constant at room temperature (ε<inf>r</inf>) was found to decrease with increasing SrTiO<inf>3</inf>. The broadness of the dielectric constant peak was observed with increasing SrTiO<inf>3</inf> content, especially that of the 0.94Bi <inf>0.5</inf>K<inf>0.5</inf>TiO<inf>3</inf> - 0.06 SrTiO<inf>3</inf> ceramic which exhibited a very broad curve over a wide temperature range. The Bi <inf>0.5</inf>K<inf>0.5</inf>TiO<inf>3</inf> - SrTiO<inf>3</inf> system was expected to be a new and promising candidate for lead-free capacitors.
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    Investigation of Oxide and Interface Trapped Charge on Threshold Voltage Shift in Gamma Irradiated NMOSFET by Subthreshold Method
    (2021-04-01)
    Ruangphanit, Anucha
    ;
    In this paper, the oxide trapped charge density (NOT) and interface trapped charge density (NIT) on the threshold voltage shift with the total dose under gamma irradiation of NMOSFET are investigated. The subthreshold technique (mV/dec) is used to separate the irradiation induced threshold voltage shifts into voltage shifts due to the interface trapped charge. The linear extrapolation method is used to extract the threshold voltage from I{DS}-V{GS} curve at low VDS of typically 100 mV. The results showed that the threshold voltage was shifted from 0.69 V to 0.45 V, the threshold swing was increased from 95 to 107 mV/dec, the oxide charge and interface charge density were found to be increase almost by 1 order in magnitude for a total gamma dose of 10 kGy.
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    Synthesis, phase formation and characterization of Co4Nb 2O9 powders synthesized by solid-state reaction
    (2008-12-01)
    Chaiyo, N.
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    Ruangphanit, A.
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    Vittayakorn, W. C.
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    A corundum-type structure of cobalt niobate (Co<inf>4</inf>Nb <sup>2</sup>O<inf>9</inf>) has been synthesized by a solid-state reaction. The formation of the Co<inf>4</inf>Nb<inf>2</inf>O<inf>9</inf> phase in the calcined powders was investigated as a function of calcination conditions by differential thermal analysis (DTA) and X-ray diffraction (XRD) techniques. Morphology and particle size have been determined by scanning electron microscopy (SEM). It was found that the minor phases of unreacted Co <inf>3</inf>O<inf>4</inf> tend to form together with the columbite CoNb <inf>2</inf>O<inf>6</inf> phase at a low calcination temperature and short dwell time. It seems that the single-phase of Co<inf>4</inf>Nb<inf>2</inf>O <inf>9</inf> in a corundum phase can be obtained successfully at the calcination conditions of 900°C for 60 min, with heating/cooling rates of 20°C /min. © 2008 Trans Tech Publications, Switzerland.
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    Development a novel model of threshold voltage of NMOS with temperature dependence and narrow channel width
    (2016-09-06)
    Ruangphanit, A.
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    Poyai, A.
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    ;
    Niemcharoen, S.
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    Titiroongruang, W.
    In paper, a development a novel model of threshold voltage of NMOS with temperature dependence and narrow channel width was presented. The models have been developed including the temperature affect of surface potentials, intrinsic carrier concentration and energy band gap. The threshold voltages were measured by the linear extrapolation methodology. The temperature dependence and the body-bias dependence of threshold voltage model of a big NMOS and a narrow channel width NMOS are proposed. The results show that, the measured threshold voltage compared with the development threshold voltage model was low level error.
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    Application of chicken eggshell waste as a starting material for synthesizing calcium niobate (Ca4Nb2O9) powder
    (2015-07-01)
    Kamkum, Phonphan
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    ; ;
    This study focused on the possibility of using CaCO<inf>3</inf> from chicken eggshell waste as a starting material for synthesizing Ca<inf>4</inf>Nb<inf>2</inf>O<inf>9</inf> powder via a conventional solid state reaction. The heat behavior of CaCO<inf>3</inf> and Nb<inf>2</inf>O<inf>5</inf> raw material mixture was studied by thermogravimetric analysis (TGA). Phase formation of Ca<inf>4</inf>Nb<inf>2</inf>O<inf>9</inf> was studied as a function of calcination conditions by Fourier transform infrared spectroscopy (FT-IR), Raman spectroscopy and X-ray diffraction (XRD). The morphology and microstructure were charaterized via Scanning electron microscope (SEM). The X-ray fluorescence (XRF) results showed that the chicken eggshell contained more than 96.0% of CaCO<inf>3</inf> by weight. The XRD pattern peaks matched the peaks of calcite CaCO<inf>3</inf> ICDD No. 85-11108 very well. Furthermore, the XRD results and Rietveld refinement analysis confirmed that the purity and single phase of Ca<inf>4</inf>Nb<inf>2</inf>O<inf>9</inf> corresponded to the monoclinic structure (ICDD: 49-0911) obtained after the calcination process. The non-isothermal kinetic of Ca<inf>4</inf>Nb<inf>2</inf>O<inf>9</inf> also was investigated by the Ozawa methods. This study indicated that CaCO<inf>3</inf> from chicken eggshell waste is an alternative starting material for synthesizing Ca<inf>4</inf>Nb<inf>2</inf>O<inf>9</inf> powder.
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    Measured and Extraction of Coupling Capacitive of Metal Interconnect Layers in VLSI
    (2018-07-02)
    Ruangphanit, Anucha
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    Nissai, Itsariya
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    Pedlub, Rujipad
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    This paper presents the measurement and extraction of the capacitance for multilayer interconnections in VLSI. The capacitance of the capacitive coupling between interconnect is measured as a function of the varying frequency in order to develop a capacitance versus frequency curve. The multi-fringe structure of interconnect metal1 layer and interconnect metal2 layer \pmb{(\text{L}=400\mu \text{m}, \ \text{no}. \ \text{strip} =80)} with the total perimeter of capacitive coupling is approximately \pmb{3.16\times 10 {4}} \pmb{\mu} \mathbf{m} of value and the area is \pmb{2.8\times 10 {4}} \ \pmb{\mu\text{m} {2}} of value are tested respectively. The line width and line spacing ratio (W/S) of interconnect is varying from 0.9/0.6, 0.9/0.9, 0.9/1.05 and 0.9/1.2 with the measured frequency of 10kHz, 100kHz, 250kHz, 500kHz, IMHZ and 5 MHz are measured. The coupling of interconnect per unit length at various line spacing as a function of measured frequency of metal1 and metal2 are reported and discussed. The results show that the coupling capacitance per unit length \pmb{(\text{F}/\mu \text{m})} increases as the spacing between adjacent interconnect lines is deceased.
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    Tetramethyl ammonium hydroxide etchant improvement for aluminum passivation and smooth of silicon surface
    (2019-03-01)
    Suttijalern, Kamonwan
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    Prabket, Jirawat
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    Niemcharoen, Surasak
    This paper purpose to the structural design and improvement of etchant solution for U-shaped Metal-Semiconductor-Metal (UMSM) photodetector fabrication on Al/n-Si/Al with anisotropic wet etching technique, the etchant solutions include tetramethylammonium hydroxide (TMAH), ammonium persulfate (AP) and silicic acid with different concentrations. Experimental design of photodetector structure to optimize the photodetector and improvement conditions of the etching solution by adding AP and silicic acid into the TMAH solution to increase the silicon surface roughness and reduce the rate of etching aluminum as electrodes. For structural design experiments, increasing the exposure area on the U-shaped groove up to 1.73 times. The results from the addition of AP to TMAH solution showed that the silicon surface is smoothness. It has a highest silicon etching rate and the addition of silicic acid to TMAH solution can reduce aluminum and silicon dioxide etching rate. Therefore, this research has the effective condition is 5 wt% TMAH with 7 g/1 AP and 34 g/1 silicic acid added. The results show the silicon surface has smooth about 5 nm and high silicon etch rate including etching aluminum equal to 0.26 μm/hr that suitable for design photodetector in further research.
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    Structure and dielectric properties of Bi0.5K 0.5TiO3-SrTiO3 lead-free ceramics
    (2011-01-01)
    Ruangphanit, Anucha
    ;
    Phetnoi, Prapapim
    ;
    Niemcharoen, Surasak
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    Bismuth potassium titanate - strontium titanate (1-x)Bi<inf>0.5</inf>K <inf>0.5</inf>TiO<inf>3</inf>-(x)SrTiO<inf>3</inf> (BKT-ST) lead-free ceramics when x = 0-0.20 were synthesized by the solid state reaction method with normal sintering. The ferroelectric phase transition was studied by X-ray diffraction (XRD). All compositions showed a single phase perovskite structure with tetragonal symmetry at room temperature and the phase structure transformed from ferroelectric tetragonal - paraelectric cubic in the range of x ≥ 0.10. Dielectric study revealed that the dielectric relaxor behavior was induced with increasing ST and transition temperature (T<inf>m</inf> ε<inf>r max</inf>) of ST-doped BKT had a tendency to decrease with increasing ST. The Bi <inf>0.5</inf>K<inf>0.5</inf>TiO<inf>3</inf>-SrTiO<inf>3</inf> system was expected to be a new and promising candidate for lead-free capacitors. © (2011) Trans Tech Publications.