Riewruja, Vanchai

Preferred name

Riewruja, Vanchai

Alternative Name

Riewruja, V.

Main Affiliation

School of Engineering

vanchai.ri@kmitl.ac.th

Now showing 1 - 10 of 13

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A low-voltage algorithmic ADC based on gray coding
(2004-11-17)
Arayawat, Somjai
;
Chaikla, Amphawan
;
Riewruja, Vanchai
;
Julsereewong, Prasit
;
Trisuwannawat, Thanit
This paper presents an algorithmic analog-to-digital converter (ADC), which is based on gray coding. The realization method makes use of the De Morgan's law-based two-input minimum circuit, which performs a low-distortion in the transfer characteristic. The proposed ADC with the low supply voltage is simple, small in size and suitable for implementing a high-resolution ADC. The performances of the proposed circuit were studied using the PSPICE analog simulation program. The simulation results verified the circuit performances are agreed with the expected values.
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An analog current-mode multiple-input Max/min circuit
(2004-11-17)
Keawconthai, Supatpong
;
Masuchun, Ruedee
;
Chaikla, Amphawan
;
Riewruja, Vanchai
;
Julsereewong, Prasit
This paper presents an analog modular multiple-input Max/Min circuit, which operates in the current-mode. The maximum and minimum functions are incorporated into the same scheme with parallel processing. The realization method is suitable for fabrication using CMOS technology. The proposed circuit has a very sharp transfer characteristic and is useful building block for the real-time systems, The performances of the proposed Max/Min, circuit were studied using the PSPICE analog simulation program. The simulation results verified the circuit performances are agreed with the expected values.
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An amplitude detector for variable frequency sinusoidal signals
(2006-12-01)
Raksachat, Pariwat
;
Chaikla, Amphawan
;
Kaewpoonsuk, Anucha
;
Riewruja, Vanchai
;
Julsereewong, Prasit
In this paper, a JK-flip-flop-based logic circuit is described. Using two output signals of this designed logic circuit to control a buffered peak detector followed by a simple sample-and-hold circuit in sequential operation, a sinusoidal amplitude detector is proposed. The proposed detector allows the frequency of input signals to be varied over a wide range. Experimental results verifying the performances of the proposed circuit are in close agreement with the expected values. © 2006 ICASE.
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Power monitoring circuit using operational amplifiers
(2010-12-01)
Rerkratn, Apinai
;
Petchmaneelumka, Wandee
;
Julsereewong, Prasit
;
Riewruja, Vanchai
In this paper presents a power monitoring circuit for battery energy management system using operational amplifiers. The proposed scheme consists of a current sensing circuit with voltage output and an analog multiplier. The voltage output of current sensing circuit is directly proportional to load current. The multiplying result of the load current in the form of voltage signal and the load voltage becomes the load power in term of output voltage of analog multiplier. The configuration of the proposed power monitoring circuit is simple and economically attractive. Simulation and experimental results confirming the performance of the proposed circuit are agreed with the expected values. ©ICROS.
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A low-voltage algorithmic ADC based on gray coding
(2004-12-27)
Arayawat, Somjai
;
Chaikla, Amphawan
;
Riewruja, Vanchai
;
Julsereewong, Prasit
;
Trisuwannawat, Thanit
This paper presents an algorithmic analog-to-digital converter (ADC), which is based on gray coding. The realization method makes use of the De Morgan's law-based two-input minimum circuit, which performs a low-distortion in the transfer characteristic. The proposed ADC with the low supply voltage is simple, small in size and suitable for implementing a high-resolution ADC. The performances of the proposed circuit were studied using the PSPICE analog simulation program. The simulation results verified the circuit performances are agreed with the expected values.
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Simple square-root extractor using op amps
(2008-12-01)
Kamsri, Thawatchai
;
Julsereewong, Prasit
;
Riewruja, Vanchai
This paper presents the simple and inexpensive method to implement a square-root extractor for voltage input signal. The proposed extractor is based on the use of two operational amplifiers (op amps) as only active elements. The proposed technique employs the op amp supply-current sensing to achieve an inherently quadratic characteristic. The low-output distortion in output signal can be achieved. Experimental results verifying the characteristic of the proposed circuit are also included.
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Positive/negative floating resistor using OTAs
(2008-12-01)
Petchmaneelumka, Wandee
;
Julsereewong, Prasit
;
Riewruja, Vanchai
A method for realizing a floating resistor based on operational transconductanee amplifiers (OTAs) is presented in this paper. The proposed design is composed of only OTAs without any external resistor. The magnitude of the obtained resistance is electronically varied by adjusting the external bias currents of OTAs. Both a positive and a negative resistance can be achieved in the same circuit. The proposed scheme provides the simple configuration and low cost. The circuit performances based on the use of the commercially available OTAs are confirmed by the experimental results.
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A CMOS-based multiple-input max/min circuit
(2005-12-01)
Keawconthai, Supatpong
;
Wangwiwattana, Chaleompun
;
Chaikla, Amphawan
;
Riewruja, Vanchai
;
Julsereewong, Prasit
This paper presents a CMOS circuit technique for realization of the current-mode multiple-input Max/Min circuit. The maximum and minimum functions are incorporated into the same scheme with parallel processing. The design strategy is based on the use of MOS transistor operating at the edge of conduction. The proposed circuit performs a low-distortion in the transfer characteristic and is useful building block for the real-time systems. The performances of the proposed circuit were studied using the PSFICE analog simulation program. The simulation results verified the circuit performances are agreed with the expected values. © 2005 IEEE.
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Temperature compensation of CMOS translinear current conveyor and OTA
(2001-12-01)
Chaikla, Amphawan
;
Julsereewong, Prasit
;
Petchmaneelumka, Wandee
;
Kamsri, Thawatchai
;
Riewruja, Vanchai
In this article, an integrable temperature compensation scheme for CMOS translinear second generation current conveyor (TCCII) and OTA is presented. The proposed scheme makes use of the new bias circuit, which has a current that is inversely proportional to the absolute temperature. The transconductance of both TCCII and OTA can also be linearly varied with the bias current. Performance of the proposed scheme is confirmed through PSPICE simulation program.
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A CMOS-based square-rooting circuit
(2007-12-01)
Rungkhum, Tipparat
;
Julsereewong, Amphawan
;
Riewruja, Vanchai
;
Julsereewong, Prasit
This paper presents a square-rooting circuit supporting both the voltage and current input signals. The realization method is based on the use of a characteristic of MOS-translinear principle. The proposed circuit is simple, small in size, and suitable for fabrication using CMOS technology. PSPICE simulation results verifying the performances of the proposed circuit are in close agreement with the calculated values. © ICROS.

Riewruja, Vanchai

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