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VDTA-Based Mixed-Mode Inverse Filter and Its Application to Mixed-Mode PID Controller
(2026-04-01)
Roongmuanpha, Natchanai
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Pukkalanun, Tattaya
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Faseehuddin, Mohammad
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Tangsrirat, Worapong
This paper presents a novel voltage differencing transconductance amplifier (VDTA)-based mixed-mode inverse filter capable of operating in voltage mode, transadmittance mode, transimpedance mode, and current mode using a single topology. The proposed configuration employs only three VDTAs with two resistors and three capacitors, offering low component count, high input/output impedance flexibility, and no requirement for component matching. It simultaneously realizes first-order inverse lowpass and highpass, as well as second-order inverse bandpass responses. A comprehensive non-ideal analysis, which includes the effects of VDTA parasitic impedances, determines the practical operating frequency range. The design is validated through PSPICE simulations using 0.18 μm CMOS technology, showing close alignment between theoretical predictions and simulation results, with cutoff frequencies of approximately 1.60 MHz and low power consumption of 0.972 mW. Further analyses confirm orthogonal tuning capability, acceptable temperature stability, and robustness against component tolerances. In a practical application, the proposed inverse filter is employed to implement a mixed-mode PID controller, which significantly improves transient response characteristics by reducing rise time, settling time, and steady-state error. These findings highlight the effectiveness and versatility of the proposed design for analog signal processing and control system applications.
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Grounded Series and Parallel RL/RC Immittance Simulators Using a Single Second-Generation Voltage Conveyor
(2026-01-01)
Roongmuanpha, Natchanai
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Tangjit, Jetwara
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Pukkalanun, Tattaya
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Faseehuddin, Mohammad
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Tangsrirat, Worapong
This work proposes the active simulation of grounded series and parallel resistive-inductive (RL) and resistive-capacitive (RC) immittance functions employing a single second-generation voltage conveyor (VCII) and three passive components. The two configurations are designed for series RL and RC immittance simulation and RL and parallel RC immittance simulation, respectively. All of the simulated immittance functions can be realized without any specific component matching or cancellation limitations. The proposed series and parallel RL and RC immittance function simulators have been simulated with PSPICE program based on 0.18 µm CMOS process parameters to validate the theoretical study. The first-order inverse filters, biquadratic filter, and synthetic lossless inductor applications, constructed with the proposed simulator circuits, are designed and evaluated to further demonstrate the practical usefulness of the designed simulators.
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Truly Mixed-Mode Universal Filter Capable of Operation in MISO and SIMO Configurations with Quadrature Oscillator as an Application
(2026-01-01)
Faseehuddin, Mohammad
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Sivagami, P.
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Shireen, Sadia
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Tangsrirat, Worapong
A versatile mixed-mode universal filter with electronic tunability is proposed in this research. The filter employs a modified differential voltage current conveyor transconductance amplifier (M-DVCCTA) as the active block. Without modifying the circuit topology, the mixed mode filter operates in single input multi-output (SIMO) and multi input single output (MISO) configurations. In addition, as an application the proposed filter is configured as a dual-mode quadrature oscillator. The designed filter can implement all five generic filter functions in voltage-mode (VM), current-mode (CM), transimpedance-mode (TIM), and transadmittance-mode (TAM). The filter design requires two M-DVCCTAs, two grounded capacitors and three resistors for implementation. To obtain VM and TIM outputs in SIMO configuration, three extra resistors are necessary. All the resistors used are active MOSFET-based resistors with variable resistance. The parasitic, non-ideal gain, and sensitivity analysis are conducted to gauge the effects of process variations and passive components spread on the filter performance. The circuit implementation and layout design of the M-DVCCTA is done in Cadence Virtuoso using 0.18-µm GPDK. The M-DVCCTA occupies an area of 63.71 * 45.66 µm<sup>2</sup>. The filters and oscillator are tested at a frequency of 3.98 MHz at ± 0.9 V supply voltage. The Monte Carlo analysis, processes corner analysis and total harmonic distortion analysis are performed to examine the robustness of the proposed designs. The simulation and theoretical results show good correlation.
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All-Grounded Passive Component Mixed-Mode Multifunction Biquadratic Filter and Dual-Mode Quadrature Oscillator Employing a Single Active Element
(2025-09-01)
Roongmuanpha, Natchanai
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Tangjit, Jetwara
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Faseehuddin, Mohammad
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Tangsrirat, Worapong
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Pukkalanun, Tattaya
This paper introduces a compact analog configuration that concurrently realizes a mixed-mode biquadratic filter and a dual-mode quadrature oscillator (QO) by employing a single differential differencing gain amplifier (DDGA) and all-grounded passive components. The proposed design supports four fundamental operation modes—voltage-mode (VM), current-mode (CM), trans-impedance-mode (TIM), and trans-admittance-mode (TAM)—utilizing the same circuit topology without structural modifications. In filter operation, it offers low-pass, high-pass, band-pass, band-stop, and all-pass responses with orthogonal and electronic pole frequency and quality factor. In oscillator operation, it delivers simultaneous voltage and current quadrature outputs with independent tuning of oscillator frequency and condition. The grounded-component configuration simplifies layout and enhances its suitability for monolithic integration. Numerical simulations in a 0.18-μm CMOS process with ±0.9 V supply confirm theoretical predictions, demonstrating precise gain-phase characteristics, low total harmonic distortion (<7%), modest sensitivity to 5% component variations, and stable operation from −40 °C to 120 °C. These results, combined with the circuit’s low component count and integration suitability, suggest strong potential for future development in low-power IoT devices, adaptive communication front-ends, and integrated biomedical systems.
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CNTFET Based Design of Optimized High Frequency VCII and Its Application as Mixed Mode Universal Filter Suitable for VHF Band
(2025-03-01)
Khole, Smita
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Bhanja, Mousumi
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Faseehuddin, Mohammad
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Shireen, Sadia
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Tangsrirat, Worapong
In this research, Carbon Nanotube Field-effect Transistors (CNTFETs) are employed in the design of a second-generation Voltage Conveyor (VCII), an analog block. The aim of this research is to study CNTFETs as an alternative to CMOS for designing high-frequency and low-voltage circuits. The complete design procedure for VCII and its two variants, namely, modified VCII (M-VCII) and VCII minus (VCII−) is presented. This work incorporates variations in the design variables of CNTFETs, including pitch, the number of tubes, and the diameter of carbon nanotubes (CNT). The study explores the impact of these variations on the critical performance parameters of the CNTFETs. The optimal values of the design variables for each transistor are calculated through extensive simulation analysis using the Verilog-A semi-empirical Stanford Virtual-Source Carbon Nanotube Field-Effect Transistor model. The CNTFET-based VCII and its variants are optimized and validated at the supply voltage of ±0.9 V. The CNTFET-based VCII exhibits improved voltage and current bandwidths of 1.4 and 1 THz, respectively. The input/output impedance and power dissipation also validate improvement compared to CMOS implementation. To verify the performance of the proposed VCII and its variants, they are used in the design of a mixed-mode universal filter (MMUF). The proposed filter is designed for a cut-off frequency of 79 MHz and consumes 7.368 mW of power. The effects of parameter variations and noise on the VCII design are also discussed.
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Cascadable First-Order and Second-Order Inverse Filters Based on Second-Generation Voltage Conveyors
(2025-02-01)
Roongmuanpha, Natchanai
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Likhitkitwoerakul, Nutcha
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Pukkalanun, Tattaya
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Faseehuddin, Mohammad
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Tangsrirat, Worapong
This study introduces four novel configurations of first-order and second-order multifunction inverse filters in both voltage-mode (VM) and current-mode (CM) using second-generation voltage conveyors (VCIIs). The first-order VM and CM inverse filters utilize only three passive components together with one VCII for VM and two VCIIs for CM realizations, which can provide lowpass and highpass inverse filter responses. The latter, second-order VM and CM multifunction inverse filters, can be constructed using the corresponding first-order inverse filters as their core circuits. These filters offer all the basic inverse filter functions, including lowpass, bandpass, and highpass inverse responses with all gains obtained from the same design. All the inverse filter realizations are cascadable. No component matching requirements are necessary for all filter responses. The non-ideal effects of the VCII on the performance of the proposed inverse filters are thoroughly examined. To prove the feasibility of the designs, the PSPICE program performed several simulations, utilizing model parameters of 0.18 µm CMOS technology. Some testing experiments were conducted using the commercially available IC-type AD844s for evaluating the practical performance of the designed inverse filters.
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Design and Experimental Validation of the Versatile Voltage Conveyor-Based Novel Mixed-Mode Universal Filter Configurations and Quadrature Oscillator
(2025-01-01)
Faseehuddin, Mohammad
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Shireen, Sadia
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Channumsin, Orapin
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Bhanja, Mousumi
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Tangsrirat, Worapong
In this research, a truly mixed-mode multi-input single-output (MISO) universal filter is designed using a second-generation voltage conveyor (VCII) and an operational transconductance amplifier (OTA). The filter is designed with three VCIIs, three OTAs, two resistors and two grounded capacitors. It is capable of producing various responses including low-pass (LP), high-pass (HP), band-pass (BP), band-reject (BR) and all-pass (AP). The filter can also function in all four possible modes of operation: voltage mode (VM), current mode (CM), trans-admittance mode (TAM) and trans-impedance mode (TIM). The merits of the filter comprise (i) no requirement for matching passive component; (ii) use of grounded capacitors; (iii) low-output impedance in VM and TIM operations; (iv) high-output impedance in CM and TAM operations; and (v) the capacity to tune the quality factor (Q) and the natural angular frequency (ω<inf>o</inf>). A dual-mode quadrature oscillator is additionally derived from the proposed filter core. The condition for oscillation and the oscillation frequency can be regulated independently. Moreover, a novel VCII-exclusive mixed-mode filter topology is developed from the designed filter. A study is performed on the non-ideal gains and parasitic effects of the circuits. The designed filters and oscillators are validated in the Cadence design suite using a 0.18 μm real CMOS process. The filters are validated at a frequency of 1.59 MHz, and the oscillator is examined at 1.25 MHz at supply voltages of ±0.9 V. The mixed-mode filter has also been experimentally tested using commercial integrated circuits (ICs), specifically AD844 and LM13700. The theoretical results are found to exhibit a close correlation with the simulated ones.
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Novel Minimum Component Dual Mode Biquadratic SIMO Filter with Electronic Tunability
(2024-01-01)
Srivastava, Abhishek
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Prasad, Harishchandra
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Singh, Umesh
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Om Mishra, Shri
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Faseehuddin, Mohammad
Two topologies of minimum component single input multiple output (SIMO) filters are designed by employing a versatile active building block (ABB), the current conveyor transconductance amplifier (CCTA). The proposed filters work in current mode (CM) and trans-admittance mode (TAM). The CM SIMO filter is designed using two CCTA and two grounded capacitors. The CM filter can be converted to TAM filter just by adding a grounded resistor without any change in the topology. There is no need of passive component matching, and the filters provide all the five responses namely, high-pass (HP), band-pass (BP), low-pass (LP), all-pass (AP), and band-stop (BS) simultaneously. In addition, it provides an independent electronic tunability of angular frequency (ω) and quality factor (Q). The active and passive sensitivities of the filter parameters are low. In CM mode the filter offers low input impedances and high output impedances and in TAM mode the filter offers high input impedance and hight output impedance that support the cascadeability. The CM and TAM filters are designed for a frequency 16.23MHz and the simulation results employing 0.18 µm CMOS technology parameters at a supply voltage of ±1.25 V are obtained using Cadence software to validate the proposed design. Also, the proposed CM SIMO universal filter has been implemented in hardware to confirm its practicality. The commercially available integrated circuits (ICs), the current feedback operational amplifier (AD844) and operational transconductance amplifier (CA3080) and employed for the experimental validation.
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Novel FDNR, FDNC and lossy inductor simulators employing second generation voltage conveyor (VCII)
(2023-09-01)
Faseehuddin, Mohammad
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Shireen, Sadia
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Herencsar, Norbert
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Tangsrirat, Worapong
In this research the second-generation voltage conveyor (VCII) is employed in the design of grounded frequency dependent negative resistor (FDNR) and Frequency dependent negative conductance (FDNC). Additionally, two lossy parallel and series R-L inductor simulators are also designed. To the best knowledge of the authors above mentioned immittance simulators are first time implemented using VCII. The FDNR requires two VCII, two capacitors and one grounded resistor. FDNC is implemented using three VCII, three resistors and two grounded capacitors. The R-L inductor emulators requires two VCII, two resistors and one grounded capacitor. All the presented immittance simulators do not require any kind of passive component matching. The non-ideal gain and sensitivity analysis is conducted to study their performance under circuit parameter variations. Parasitic analysis is also done for the FDNR, FDNC and R-L inductance simulators to study the effect of parasitic impedance on the circuit operation. To validate the designs, they are simulated in Cadence design environment using 0.18 μm process design kit (PDK) at ±0.9 V supply. Additionally, the circuits are also validated using the macro model of commercially available integrated circuit (IC) AD844. The theoretical and simulation results are found to be in close agreement.
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VDTA-based floating/grounded series/parallel R-L and R-C immittance simulators with a single grounded capacitor
(2023-02-01)
Moonmuang, Pitchayanin
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Faseehuddin, Mohammad
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Pukkalanun, Tattaya
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Herencsar, Norbert
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Tangsrirat, Worapong
Active configurations for simulating floating/grounded series and parallel immittance functions based on voltage differencing transconductance amplifiers (VDTAs) are proposed. The grounded series and parallel immittance simulators presented here require only one VDTA, while the proposed floating ones only need two. Each of the suggested simulators uses a single grounded capacitor. The proposed topologies can imitate R-L and R-C immittances in both series and parallel types. All of the simulated equivalent elements are electronically adjustable through the VDTA's transconductance. Furthermore, no component-matching restrictions are imposed in order to achieve the appropriate immittance function. Applications of the proposed VDTA-based immittance simulators include bandpass filter and quadrature oscillator implementations. The behaviors of the proposed circuits and their applications are evaluated by PSPICE simulations and experimental observations using VDTA implemented with commercially available CA3080 type OTAs.

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