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Design of an X-Band CMOS VCO with a Transformer-Coupled and Transconductance-Boosted Stacked Topology
(2026-06-01)
Peng, Yen Ying
;
Li, Syu Bin
;
Wang, Sen
;
Pakasiri, Chatrpol
This paper presents the design and implementation of an X-band voltage-controlled oscillator (VCO) fabricated in a standard 180-nm CMOS process. To sustain stable oscillation under a constrained power budget, a gm-boosted topology is employed, integrating vertically stacked cross-coupled transistors with a center-tapped transformer to enhance the equivalent negative conductance. The boosting is achieved through two complementary mechanisms: the center-tapped transformer performs an impedance transformation that repurposes the layout parasitic capacitances into transconductance-enhancing elements, while the stacked cross-coupled pair reuses the DC current and suppresses the source-degeneration of a conventional pair, jointly sustaining a robust start-up margin at a low 0.75 V supply. On-wafer measurement results demonstrate a frequency tuning range from 8.78 GHz to 9.13 GHz as the control voltage is swept from 0 V to 1.8 V, with an average VCO gain K<inf>VCO</inf> of 447.5 MHz/V. Under a total DC power consumption of 6.9 mW, the oscillator delivers an output power of 4.54 dBm and exhibits a measured phase noise of −103 dBc/Hz at a 1-MHz offset.
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A 0.3 V Current Differencing Buffered Amplifier and Its Application in Current-Mode Third-Order Low-Pass Filters
(2025-05-01)
Khateb, Fabian
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Kumngern, Montree
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Kulej, Tomasz
This paper introduces an innovative low-voltage, low-power current differencing buffered amplifier (CDBA). The proposed CDBA utilizes a bulk-driven MOS transistor operating in the subthreshold region, allowing it to function effectively at low supply voltages while minimizing power consumption, making it suitable for sensor and biomedical applications. To demonstrate the performance of the proposed CDBA, it is incorporated into the design of a current-mode, third-order low-pass filter that is specifically tailored for bio-sensing applications. Both the CDBA and the low-pass filter are designed and simulated in Cadence Virtuoso using the TSMC 0.18 µm CMOS process. The CDBA operates at a supply voltage of 0.3 V, consuming 170 nW of power, while the third-order low-pass filter achieves a dynamic range of 57.2 dB with a total harmonic distortion (THD) of 1%.
1
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0.5-V High-Order Universal Filter for Bio-Signal Processing Applications
(2025-04-01)
Kumngern, Montree
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Khateb, Fabian
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Kulej, Tomasz
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Lerkvaranyu, Somkiat
In this paper, a novel multiple-input operational transconductance amplifier (MI-OTA) is proposed. The MI-OTA can be obtained by using the multiple-input bulk-driven MOS transistor (MIBD MOST) technique. The circuit structure is simple, can operate with a supply voltage of 0.5 V, and consumes 937 pW at a current setting of 625 pA. The proposed MI-OTA was used to implement a high-order multiple-input voltage-mode universal filter. The proposed filter can provide non-inverting and inverting low-pass, high-pass, band-pass, band-stop, and all-pass transfer functions to the same topology. In addition, it has a high input impedance and does not need any inverted input signals, so there is no additional buffering circuit. The proposed filter can be used for biological signal processing. The proposed MI-OTA and the second-order universal filter were simulated in Cadence using CMOS process parameters of 0.18 μm from TSMC to verify the functionality and performance of the new structures.
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A 38.4 nW, 1.2 V, 250-Hz, 2nd-Order gm - C LPF With Degenerative SCP Transconductors Achieving 800-mVPP Input Range and 82.1- μVrms IRN for ECG Acquisition
(2025-01-01)
Thanapitak, Surachoke
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Pawarangkoon, Prajuab
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Surakampontorn, Wanlop
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Ahmad, Rafidah
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Abdullah Zawawi, Ruhaifi
In this brief, a 2{^{\text {nd} -order gm - C lowpass filter with a practical input linear range of 400mV P dedicated to ECG signal acquisition is proposed. This filter employs a degenerative source-coupled-pair circuit as a gm cell. It enhances the linear input range by a factor of × 4 compared with the source follower filter. Additionally, to mitigate the effect of current source mismatch, a dynamic element matching technique is applied. By doing so, HD2 is suppressed more than 1.5 dB over the entire passband frequency. This proposed filter is implemented in a 0.18 μ m CMOS process. It offers a 250-Hz bandwidth with input-referred noise and a dynamic range of 82.1 μ Vrms and 67.34 dB, respectively. The power consumption of 38.4 nW is achieved with a 1.2 V supply. Compared with other recent nano-power filters, the proposed filter provides the highest linear input range with competitive Figure-of-Merit to the top-tier designs. It is therefore beneficial to the practical implementation of a low-power ECG acquisition system.
1
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Modular Class-AB Current Multiplier Based on Fully-Differential Hyperbolic Transconductor
(2021-05-26)
Kongpoon, Metha
This paper presents a new class-AB current multiplier using fully differential hyperbolic sine transconductors based on floating-gate transistors. The proposed multiplier is developed from a hyperbolic sine multiplication identity which inherently provides a class-AB operation. The proposed multiplier was designed using 0.35 μm AMS CMOS process. Simulation results show that the proposed multiplier achieves -30 dB THD for high input modulation index of 23 while utilizing power consumption of 60 nW under a supply voltage of 3 V.
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A low-phase-noise and low-power CMOS colpitts VCO using Gm boosting and capacitance switching techniques
(2021-01-01)
Pakasiri, Chatrpol
;
You, Jia Hao
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Wang, Sen
This letter presents a low-power and low-phase-noise 5-GHz VCO fabricated in a standard CMOS 0.18-μm process. The low power dissipation was achieved by using the PMOS cross-coupled pair and G<inf>m</inf>-boosting topology, and the low phase noise was obtained by adding two pairs of switched capacitor array. The VCO consumed a dc power of 2.92 mW with the supply voltage of 1 V. The measured phase noises were − 104.6 dBc/Hz and − 117.4 dBc/Hz at 1 MHz offset frequency with switched off and on capacitances, respectively, which demonstrated 12.8-dB improvement.
2
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Ultra-low-power, modular, class-AB current multiplier
(2019-07-01)
Kongpoon, Metha
This paper describes a modular class-AB current multiplier which provides the good linearity, the linearly tunable conversion gain and the robustness to process mismatch. The proposed multiplier is derived from a hyperbolic sine multiplication identity, and was designed and simulated using 0.35 μm AMS CMOS process. Simulation results show that the improved linearity, linearly tunable conversion gain and better process variation robustness can be achieved while utilizing lower power consumption and the slightly higher number of transistors compared to the state-of-the-art class-AB current multiplier.
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0.3V bulk-driven current conveyor
(2019-01-01)
Khateb, Fabian
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Kulej, Tomasz
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Kumngern, Montree
This paper presents the design and the experimental results of a sub 0.5 V bulk-driven (BD) current conveyor (CCII) using 0.18μm TSMC CMOS technology with a total chip area of 0.0134 mm<sup>2</sup>. All transistors are biased in the subthreshold region for low-voltage low-power operation and the input transistors are controlled from their bulk terminals for rail-to-rail input voltage range. The circuit is designed to work with voltage supply (V<inf>DD</inf> = 0.3V), which is much lower than the threshold voltage of the MOS transistor (V<inf>TH</inf> = 0.5V) while consuming 19 nW of power. The measurement results confirm the proper function of the proposed circuit.
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A 1-V, 6-nW programmable 4th-order bandpass filter for biomedical applications
(2015-08-06)
Sundarasaradula, Yuwadee
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Thanachayanont, Apinunt
This paper presents the design and realization of a programmable 4<sup>th</sup>-order bandpass filter for biomedical applications in a standard 0.18 μm CMOS technology. The center frequency is adjustable from 80 Hz to 7 KHz, using a 6-bit digital-to-analog-converter (DAC). At a center frequency of 1 KHz and quality factor of 4, the simulated dynamic range is 53.6 dB for 1% total harmonic distortion (THD) and the simulated total input-referred noise, integrated from 875 Hz to 1.125 KHz, is 177μV. The filter consumes only 6 nW from a 1-V single power supply voltage.
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0.5-V bulk-driven fully differential current conveyor
(2015-01-14)
Kumngern, Montree
;
Khateb, Fabian
This paper presents a new low-voltage supply and low-power consumption bulk-driven fully differential current conveyor (BD-FDCCII) which is suitable for low-voltage signal processing applications. The bulk-driven MOS technique is used to achieve a low-voltage supply as low as a 0.5V, also, a rail-to-rail input voltage swing. As an example application, a voltage-mode biquadratic filter using BD-FDCCII is presented. The proposed BD-FDCCII is simulated by PSPICE simulators using TSMC 0.18 μm n-well CMOS technology.

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