Wisetphanichkij, Sompong
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Wisetphanichkij, Sompong
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sompong.wi@kmitl.ac.th
15 results
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Item type:Publication, A low-voltage CMOS current squarer circuit(2005-12-01); ; Dejhan, KobchaiThis paper presents a low-voltage current-mode CMOS squarer circuit. The low voltage operation can be achieved by the simple circuit design of the simple CMOS current mirrors and voltage shifting circuit. The realization method uses the MOS square-law technique in saturation region and require only V <inf>Th</inf>+2V<inf>DS</inf>. Simulation results show that the proposed circuit works well at supply voltage of 1V for a 0.5μm technology. © 2005 IEEE. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Multi-resolution image registration based on correlation technique(2005-01-01); Dejhan, KobchaiThis paper proposed the new techniques of the multi-resolution image registration. The two images (reference and searching images), firstly, were prepared by decompose to multi-resolution images with discrete wavelet transform (DWT). Then the factional masks are created and convert to the binary masks base-on prior information. This efficiency mask-based algorithm operates in the coarse-to-fine resolution fashion on low-pass sub-band of decomposed image. Then the correlation performed at each resolution level to accomplish the registration problem © 2005 IEEE. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A design of ternary Schmitt trigger circuit(1999-12-01); - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Minimal Realization Plus Current Output CC-based Biquad Circuit(2023-01-01); - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Near Full Stroke Length Linear Range Enhancement Circuit for Linear Variable Differential Transformer (LVDT)(2023-01-01)This paper proposes a linear range enhancement circuit for Linear Variable Differential Transformer (LVDT). The nonlinear is compensated with a signal obtained from an inverse hyperbolic tangent function circuit and with the appropriate gain settings within the circuit. The efficiency of the proposed circuit depends on the accuracy of the signal obtained by the inverse hyperbolic tangent function circuit. The simulation results with Pspice® program demonstrate the efficiency of the proposed circuit for enhancing the linear operating distance of the transducer. Under a relative error a(%) of 2.2%, the linear operating range is improved from ± 9mm to ± 35mm for LVDT Kn=250(kn=0.1) at ± 37mm full stroke length, which is much wider compared to the signal obtained from the transducer before the improvement. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, The combinational and sequential adiabatic circuit design and its applications(2009-04-08); Dejhan, KobchaiIn this paper, a new design of adiabatic circuit, called the quasi-static efficient charge recovery logic (QSECRL) is proposed. To achieve minimum energy consumption, this paper proposes a technique to reduce channel resistance and remove diodes from the signal path. This design method can be implemented in both combination logic and sequential logic. The counter circuit and the 8-bit carry look-ahead (CLA) circuit, a more complex circuit, are selected to evaluate this proposed design. All simulations in this paper have been implemented by SPICE with the 0.8 μm MOSIS technology MOS transistor model under 2-volt (peak-peak) sinusoidal power-clock supply. The results show significantly improved performance of the 8-bit CLA circuit with 20-30 fJ and 70 fJ energy consumption at 10-100 MHz and 500 MHz operating frequency, respectively. © Birkhäuser Boston 2009. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Jitter decomposition by derivatived Gaussian wavelet transform(2004-12-01); Dejhan, KobchaiThis paper proposes a new method of jitter decomposition. The results are deterministic jitter and random jitter that obtained by derivatived Gaussian wavelet transform and Fisher's information, respectively. The idea is based-on the searching of two Gaussian tails on normalized jitter histogram. The simulation and experiment result are shown and discussed in term of accuracy and noise immunity. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A new adjustable grounded/floating resistance circuit with enhanced dynamic range based on mixed-translinear loops(2005-12-01); - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Minimal Realization Plus Current Output CC-based Biquad Circuit(2024-06-01); 3 - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A 1.1-V Low power true single-phase clock 2/3 prescaler(2017-10-19); ; Tudsorn, ApirakThis paper is proposed a low-power CMOS 2/3 prescaler using true single-phase technique on 45 nm CMOS technology with 1.1 V. The true-single-phase clock divider is used to achieve low power. The prescaler is capable of operating from 1 to 16 GHz. When operating at 1 GHz, it saves more power consumption compared to that of a conventional circuit and lowpower true single-phase clock CMOS 2/3 prescalers circuit operating in divide-by-2 mode and in divide-by-3 mode, respectively.4