Julsereewong, Amphawan

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Preferred name
Julsereewong, Amphawan
Alternative Name
Julsereewong, A.
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Email
amphawan.ju@kmitl.ac.th

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    A simple CMOS-based algorithmic ADC
    (2007-12-01)
    Kaewpoonsuk, Anucha
    ;
    Cheypoca, Thepjit
    ;
    Julsereewong, Amphawan
    ;
    Riewruja, Vanchai
    This paper presents a one-bit cell of reverse Gray-code algorithmic analog-to-digital converter. The proposed converter comprises of full-wave rectifier, current mirrors, and current comparator. The realization method is simple, small in size, and suitable for integrated circuit form. The design strategy is based on the MOS biased at the edge of conduction to provide a low accumulated error and a low distortion in the transfer characteristic. An N-bit resolution can be achieved by cascading of the N proposed one-bit cells. PSPICE simulation results supporting the characteristics of proposed circuit are agreed with the expected values. © ICROS.
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    A voltage/current controlled oscillator using OTAs and RS flip flop
    (2008-12-01)
    Pongswatd, Sawai
    ;
    Julsereewong, Amphawan
    ;
    Tirasesth, Kitti
    ;
    Sasaki, Hirofumi
    ;
    Shi, Yan
    This paper presents an electronic oscillator specially designed to be controlled in oscillation frequency by the control voltage and external bias current signals. The realization technique is simple and inexpensive based on the use of commercial available devices. The proposed circuit consists of operational transconductance amplifiers (OTAs) and an RS Flip Flop to generate tunable sawtooth and square waves. Experimental results verifying the performances of the proposed circuit are in close agreement with the expected values. An application example showing the usefulness of the proposed voltage controlled oscillator in phase-locked loop frequency synthesizer is also introduced. © 2008 SICE.
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    Buck converter controlled by using variable switching frequency technique
    (2008-12-01)
    Julsereewong, A.
    ;
    Pongswatd, S.
    ;
    Julsereewong, P.
    ;
    Tirasesth, K.
    ;
    Sasaki, H.
    In this paper, a linearly tunable voltage controlled oscillator with negatively proportional characteristic, termed VCO, is described. Using the VCO and analog PI controller in feedback path of a buck converter operating in continuous condition mode, a control technique with variable switching frequency is presented. No filtering capacitor is required in the proposed technique that provides the advantage of a simple and compact structure. Experimental results show that the output voltage ripple can be reduced. The output voltage regulation can be also kept in constant without stability problems. © 2008 IEEE.
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    Simple VCO with negative voltage-frequency relation
    (2008-12-01)
    Pongswatd, Sawai
    ;
    Julsereewong, Amphawan
    ;
    Tirasesth, Kitti
    ;
    Sasaki, Hirofumi
    ;
    Shi, Yan
    A simple voltage controlled oscillator (VCO) with negative voltage-frequency (V-F) relation is presented in this paper. The realization technique is based on the use of commercial available devices to generate tunable sawtooth and square wave signals. Decreasing the control voltage linearly increases the output oscillation frequency. The proposed VCO consists of operational transconductance amplifiers (OTAs) and an RS Flip Flop. Experimental results showing the circuit performances are agreed with the expected values. The usefulness of the proposed circuit is demonstrated through application example with reducing the output ripple waveforms of a buck converter.
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    Simple square-rooting voltage-to-frequency converter
    (2008-12-01)
    Julsereewong, A.
    This paper presents a simple method based on commercially available devices for realizing the square-rooting voltage-to-frequency converter (VFC). The output frequency is proportional to the square root of the input voltage signal. The realization technique employs an operational transconductance amplifier (OTA)-based square root extractor and a NOR-based Set-Reset (S-R) latch. The scale factor of the square root extractor can be electronically varied by changing the external bias currents of the OTAs. Experimental results verifying the performances of the proposed square-rooting VFC are agreed with the expected values. © 2008 IEEE.
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    Simple CCO using CCIIs and S-R latch and its application
    (2009-12-01)
    Chumkasean, Manop
    ;
    Julsereewong, Amphawan
    ;
    Pongswatd, Sawai
    ;
    Julsereewong, Prasit
    ;
    Sasaki, Hirofumi
    A simple circuit technique to realize current controlled oscillator (CCO) with two low-impedance input terminals is presented. By suitably setting two input signals, the linear frequency-current relation of the proposed CCO can be either positive or negative slope in the same circuit configuration. The oscillating output frequency proportional to the difference between two input currents can be also obtained. The realization method is employed second-generation current conveyors and Set-Reset latch. Experimental results verifying performances of the proposed CCO are in close agreement with expected values. To demonstrate the usefulness of the proposed oscillator, application example in current-mode variable-frequency control for buck converter is included. © 2009 IEEE.
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    A CMOS-based square-rooting circuit
    (2007-12-01)
    Rungkhum, Tipparat
    ;
    Julsereewong, Amphawan
    ;
    Riewruja, Vanchai
    ;
    Julsereewong, Prasit
    This paper presents a square-rooting circuit supporting both the voltage and current input signals. The realization method is based on the use of a characteristic of MOS-translinear principle. The proposed circuit is simple, small in size, and suitable for fabrication using CMOS technology. PSPICE simulation results verifying the performances of the proposed circuit are in close agreement with the calculated values. © ICROS.
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    Accurate dual slope analog-to-digital converter using bootstrap circuit
    (2009-12-01)
    Julsereewong, Amphawan
    ;
    Pongswatd, Sawai
    ;
    Riewruja, Vanchai
    ;
    Sasaki, Hirofumi
    ;
    Fujimoto, Kuniaki
    This paper presents a simple and inexpensive implementation of the accurate dual slope analog-to-digital converter (ADC). The proposed technique with positive reference voltage takes advantages of a bootstrap circuit to function as a precise noninverting/inverting integrator. To achieve the constant reference voltage during integrating analog input voltage interval, a sample/hold (S/H) circuit is employed. Experimental results are given to confirm the operation of the proposed ADC. © 2009 IEEE.
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    Dual slope adc using non-inverting controlled bootstrap circuit
    (2009-12-01)
    Julsereewong, Amphawan
    ;
    Pongswatd, Sawai
    ;
    Sasaki, Hirofumi
    ;
    Fujimoto, Kuniaki
    ;
    Shi, Yan
    This article presents the simple and inexpensive method to realize the dualslope analog-to-digital converter (ADC). The proposed technique is based on theuse of non-inverting controlled bootstrap circuit in connection with thedesigned control logic circuit, counter, and latching circuit. PSPICE simulationand experimental results are used to confirm the performances of the proposedADC. ICIC International © 2009.
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    A voltage-mode gray-code algorithmic ADC
    (2008-12-01)
    Arayawat, Somjai
    ;
    Thubtong, Uthan
    ;
    Julsereewong, Prasit
    ;
    Riewruja, Vanchai
    ;
    Julsereewong, Amphawan
    This paper presents a design technique of a Gray-code algorithmic analog-to-digital converter (ADC) operating in voltage mode. The realization method is based on the use of commercial available devices. The proposed converter comprises the operational transconductance amplifiers (OTAs), diodes, resistors, and voltage comparator to synthesize the triangular-like DC transfer characteristic and digital output for one-bit cell ADC. An N-bit resolution can be simply implemented by cascading the N proposed one-bit cells. Experimental results verifying the circuit performances are agreed with the theoretical values. © 2008 SICE.