Muanghlua, Rangson

Loading...
Thumbnail Image
Preferred name
Muanghlua, Rangson
Alternative Name
Muanghlua, R.
Muanghlua, Rangsan
Main Affiliation
Email
rangson.mu@kmitl.ac.th

Settings

Now showing 1 - 4 of 4
  • Loading...
    Thumbnail Image
    Some of the metrics are blocked by your 
    consent settings
    Item type:Publication,
    Development a novel model of threshold voltage of NMOS with temperature dependence and narrow channel width
    (2016-09-06)
    Ruangphanit, A.
    ;
    Poyai, A.
    ;
    Muanghlua, R.
    ;
    Niemcharoen, S.
    ;
    Titiroongruang, W.
    In paper, a development a novel model of threshold voltage of NMOS with temperature dependence and narrow channel width was presented. The models have been developed including the temperature affect of surface potentials, intrinsic carrier concentration and energy band gap. The threshold voltages were measured by the linear extrapolation methodology. The temperature dependence and the body-bias dependence of threshold voltage model of a big NMOS and a narrow channel width NMOS are proposed. The results show that, the measured threshold voltage compared with the development threshold voltage model was low level error.
  • Loading...
    Thumbnail Image
    Some of the metrics are blocked by your 
    consent settings
    Item type:Publication,
    Temperature and devices dimension dependence on threshold voltage, the low field mobilty and the series parasitic resistance of PMOSFET
    (2013-09-02)
    Sakuna, N.
    ;
    Muanghlua, R.
    ;
    Niemcharoen, S.
    ;
    Ruangphanit, A.
    ;
    Poyai, A.
    This paper presents the temperature and devices dimension dependence on the threshold voltage, low field mobility and series parasitic resistance of PMOS over operating temperature range of 27 °C to 125 °C. The relation of I<inf>DS</inf> and V<inf>GS</inf> in linear region was used with a different of channel length and channel width. The parameters extraction procedure is based on the measurement of the transconductance characteristics of MOSFET in linear region. The results show that, the temperature coefficient for threshold voltage is around 1.7mV/K approximately. The low field mobility degradation parameter is decreased by the factor of 0.68. The temperature coefficient of source-drain series resistance per unit channel width (R<inf>DSW</inf>) is approximately 16.7 ohm-um/K. These data are necessary not only should be compared with the results of NMOS but also should be used for the circuit designer to understanding well in the elevated operating temperatures. © 2013 IEEE.
  • Loading...
    Thumbnail Image
    Some of the metrics are blocked by your 
    consent settings
    Item type:Publication,
    A new model for predicting the effect of temperature and devices dimension on threshold voltage of PMOS in VLSI
    (2015-08-17)
    Ruangphanit, A.
    ;
    Poyai, A.
    ;
    Sakuna, N.
    ;
    Niemcharoen, S.
    ;
    Muanghlua, R.
    This paper presents a new model for predicting the effect of temperature and the devices dimension on the threshold voltage of PMOS. Temperature-dependent models have been developed including the temperature affect of surface potentials, intrinsic carrier concentration and energy band gap. The developed models have been used to study the temperature dependent and narrow channel width on the threshold voltage of PMOS. The new temperature coefficient for threshold voltage and the body-bias coefficient of threshold voltage of a big PMOS and a narrow channel width of MOSFET are proposed. The model can be implemented in simulation tools with the error is less than 3%.
  • Loading...
    Thumbnail Image
    Some of the metrics are blocked by your 
    consent settings
    Item type:Publication,
    The effects of temperature and device demension of MOSFETs on the DC characteristics of CMOS inverter
    (2012-10-02)
    Ruangphanit, A.
    ;
    Kiddee, K.
    ;
    Poyai, A.
    ;
    Wongprasert, Y.
    ;
    Niemcharoen, S.
    The CMOS fabrication technology requires both n-channel (NMOS) and p-channel (PMOS) transistors be built on the same substrate. To ensure the reliability of the circuit performance over the temperature range, the circuits must be designed accommodate the basic variations parameters as a function of parameter. The temperature dependence of the MOSFET parameters as well as the small dimension effects on the dc characteristics of submicrometer CMOS inverters operated over the temperature range of 27- 125 degree Celsius are presented. The results show that the threshold voltage temperature coefficient (TCV) of both devices increased as the channel width decreased. PMOS has a larger affect more than NMOS because of a buried channel device. The Voltage Transfer Characteristics (VTC) of an inverter shows a symmetrical gate at WR is 2.0. However, the narrow channel effect, threshold voltage matching and ratio B <inf>R</inf> are key problem of CMOS inverter worked. Finally, these results will support the process engineer, circuit designer to improve device performance in the next fabrication. © 2012 IEEE.