Muanghlua, Rangson
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Muanghlua, Rangson
Alternative Name
Muanghlua, R.
Muanghlua, Rangsan
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rangson.mu@kmitl.ac.th
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Item type:Publication, Effect and Determination of Oxide Trapped Charge and Interface Trapped Charge Density of Threshold Voltage Shift in Irradiated MOSFET by Subthreshold Methodology(2023-10-01); This paper presents the effects and determination of oxide and interface trapped charge density of threshold voltage shift in irradiated MOSFET by subthreshold methodology. The designed dimension, channel width per channel length (W/L) is 20 µm/20 µm. The threshold voltage is extracted by a linear extrapolation methodology. The over all threshold voltage shifts are caused by oxide trapped charge and interface trapped charge. The subthreshold methodology determines the interface trapped charge. The<sup>60</sup>Co gamma-ray source was used for irradiation to a total dose of 10 kGy. The results showed that the threshold voltage shift is approximately-24 mV/kGy for NMOS and-27 mV/kGy for PMOS. The subthreshold swing shift is approximately 1.2 mV/dec.kGy for NMOS and 0.9 mV/dec.kGy for PMOS. The oxide trapped charge density N<inf>OT</inf> and interface trapped charge density N<inf>IT</inf> are found to be increased in NMOS and PMOS respectively. The ratio of ΔN<inf>OT</inf>/ΔN<inf>IT</inf> was approximately 2.2 times for NMOS and 2.8 times. Due to the structure, the channel of NMOS is a surface channel whereas the channel of PMOS is a buried channel. Finally, the effect of gamma irradiation on the PMOS was greater than the effect on NMOS observed from the change in threshold voltage and the ratio of ΔN<inf>OT</inf>/ΔN<inf>IT.</inf>. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Effects of Temperature and Channel Doping on the BSIM3 Threshold Voltage Model of NMOSFET form Substrate Bias Dependent Methodology(2016-01-01); - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A new model for predicting the effect of temperature and devices dimension on threshold voltage of PMOS in VLSI(2015-08-17) - Some of the metrics are blocked by yourconsent settings
Item type:Publication, The effects of temperature and device demension of MOSFETs on the DC characteristics of CMOS inverter(2012-10-02); ; Niemcharoen, S.The CMOS fabrication technology requires both n-channel (NMOS) and p-channel (PMOS) transistors be built on the same substrate. To ensure the reliability of the circuit performance over the temperature range, the circuits must be designed accommodate the basic variations parameters as a function of parameter. The temperature dependence of the MOSFET parameters as well as the small dimension effects on the dc characteristics of submicrometer CMOS inverters operated over the temperature range of 27- 125 degree Celsius are presented. The results show that the threshold voltage temperature coefficient (TCV) of both devices increased as the channel width decreased. PMOS has a larger affect more than NMOS because of a buried channel device. The Voltage Transfer Characteristics (VTC) of an inverter shows a symmetrical gate at WR is 2.0. However, the narrow channel effect, threshold voltage matching and ratio B <inf>R</inf> are key problem of CMOS inverter worked. Finally, these results will support the process engineer, circuit designer to improve device performance in the next fabrication. © 2012 IEEE.