Riewruja, Vanchai
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Riewruja, Vanchai
Alternative Name
Riewruja, V.
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vanchai.ri@kmitl.ac.th
40 results
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Item type:Publication, A simple CMOS-based algorithmic ADC(2007-12-01); ; This paper presents a one-bit cell of reverse Gray-code algorithmic analog-to-digital converter. The proposed converter comprises of full-wave rectifier, current mirrors, and current comparator. The realization method is simple, small in size, and suitable for integrated circuit form. The design strategy is based on the MOS biased at the edge of conduction to provide a low accumulated error and a low distortion in the transfer characteristic. An N-bit resolution can be achieved by cascading of the N proposed one-bit cells. PSPICE simulation results supporting the characteristics of proposed circuit are agreed with the expected values. © ICROS. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Simple square-rooting circuit using OTAs(2008-08-28)A method to implement a square-rooting circuit is described. The proposed circuit employs operational transconductance amplifiers (OTAs) as the only active elements. The implementation technique is based on an electronically variable resistor formed by the OTA, where the magnitude of the resistance is controlled by the output current, to provide the square-rooting function. The proposed scheme can operate with both a voltage input and a current input signal. The purpose of the circuit is emphasised in terms of simple configuration, high accuracy and low cost. Experimental results showing the circuit performance are presented. © 2008 The Institution of Engineering and Technology. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A low-voltage algorithmic ADC based on gray coding(2004-11-17); - Some of the metrics are blocked by yourconsent settings
Item type:Publication, An analog current-mode multiple-input Max/min circuit(2004-11-17); Julsereewong, PrasitThis paper presents an analog modular multiple-input Max/Min circuit, which operates in the current-mode. The maximum and minimum functions are incorporated into the same scheme with parallel processing. The realization method is suitable for fabrication using CMOS technology. The proposed circuit has a very sharp transfer characteristic and is useful building block for the real-time systems, The performances of the proposed Max/Min, circuit were studied using the PSPICE analog simulation program. The simulation results verified the circuit performances are agreed with the expected values. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, An amplitude detector for variable frequency sinusoidal signals(2006-12-01); Julsereewong, PrasitIn this paper, a JK-flip-flop-based logic circuit is described. Using two output signals of this designed logic circuit to control a buffered peak detector followed by a simple sample-and-hold circuit in sequential operation, a sinusoidal amplitude detector is proposed. The proposed detector allows the frequency of input signals to be varied over a wide range. Experimental results verifying the performances of the proposed circuit are in close agreement with the expected values. © 2006 ICASE. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A low-voltage wide-band CMOS precision full-wave rectifier(2002-06-01); Guntapong, RojanakornA simple integrable circuit for implementing a precision full-wave rectifier circuit in CMOS technology, which can be operated from a low-voltage power supply, is described. The realization method is based on the use of a MOS class AB configuration to improve the high frequency performance. The circuit exhibits a very sharp corner in the dc transfer characteristic. Simulation results showing the performance of the proposed circuit are also presented. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A current signal CMOS sample-and-hold circuit(2007-12-01); - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Square-rooting and absolute function circuits using operational amplifiers(2009-04-20); Kamsri, T.A method for implementing Square-rooting and absolute function circuits using operational amplifiers (opamps) as only active elements is introduced. The realisation technique is provided through the use of the opamp supply-current sensing, which utilises an inherently quadratic characteristic of the opamp class-AB output stage. The proposed circuits are attractive in terms of simple configuration and low cost. The performances of the circuits are discussed in detail. Experimental results demonstrating the characteristics of the circuits using commercially available opamps are also included. © 2009 The Institution of Engineering and Technology. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A low-voltage algorithmic ADC based on gray coding(2004-12-27); - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A CMOS-based algorithmic ADC(2005-01-01); Julsereewong, P.This paper presents a one-bit cell of reverse Gray-code algorithmic analog-to-digital converter, which operates in the current mode. The realization method is simple, small in size, and suitable for fabrication using CMOS technology. The design strategy is based on the MOS bias at the edge of conduction to provide a high-speed operation and a low distortion in the transfer characteristic. The N-bit resolution can be achieved by cascading of the N proposed one-bit cells. PSPICE simulation results verifying the proposed circuit performances are agreed with the expected value. ©2005 IEEE.