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    Item type:Publication,
    1.2 V differential difference current conveyor using MIGD MOST technique and its applications
    (2023-01-01)
    Kumngern, Montree
    ;
    Khateb, Fabian
    ;
    Phatsornsiri, Punnavich
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    Jongchanachavawat, Wirote
    ;
    Kulej, Tomasz
    This paper presents a new differential difference current conveyor (DDCC), realized using multiple-input gate-driven MOS transistor (MIGD MOST) technique. The application of MIGD MOST can reduce the number of differential pairs in the input stage of the DDCC, thus simplifying its overall structure. Unlike previous DDCC, the output stage of the circuit operates in super class-AB, that offers low static power consumption, high load driving capability and improved gain-bandwidth product (GBW).The proposed DDCC can work with the supply voltage of 1.2 V and consumes 44.2 μW of power. The proposed DDCC has been used to realize a versatile circuit that can work as a universal filter or a quadrature oscillator into a single topology. When the circuit works as a universal filter, it can realize low-pass, band-pass, high-pass, band-stop and all-pass voltage responses. The natural frequency and the quality factor of these responses can be orthogonally controlled. When the circuit works as a quadrature oscillator, the condition and the frequency of oscillators can be orthogonally controlled. The proposed MIGD DDCC and the proposed universal filter and quadrature oscillator have been simulated with SPICE, using 0.18 μm CMOS process parameters to prove the functionality and workability of the new circuits.
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    Item type:Publication,
    Extremely low-voltage low-power differential difference current conveyor using multiple-input bulk-driven technique
    (2020-08-01)
    Kumngern, Montree
    ;
    Khateb, Fabian
    ;
    Kulej, Tomasz
    In this paper, a new differential difference current conveyor (DDCC) with ultra-low voltage and low-power capability is presented. The DDCC is designed by using a non-tailed differential pair with multiple-input bulk-driven MOS transistor technique to obtain a rail-to-rail input common-mode swing and extremely low supply voltage. The MOS transistors biased in the sub-threshold region have been used to achieve extremely low power consumption. The performance of the proposed DDCC is evaluated by simulation results using SPICE program and MOS transistors parameters provided by a standard n-well 0.18 µm CMOS process from TSMC. A rail-to-rail input common-mode range was shown and a high accuracy was expressed. The bandwidth was 2.2 kHz and the total harmonic distortion was 1% for an input signal with amplitude of 240 mV<inf>p-p</inf>, obtained at supply voltage of 0.3 V and power dissipation of 28.6 nW. The proposed DDCC has been used to realize a sixth-order low-pass filter for application to electrocardiogram (ECG) applications.
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    Item type:Publication,
    0.3 V Differential Difference Current Conveyor Using Multiple-Input Bulk-Driven Technique
    (2020-06-01)
    Kumngern, Montree
    ;
    Khateb, Fabian
    ;
    Kulej, Tomasz
    This paper presents a new ultra-low voltage and ultra-low power differential difference current conveyor (DDCC) which is suitable for portable electronic applications. The proposed DDCC uses the subthreshold technique to reduce the power consumption and the bulk-driven technique to obtain a rail-to-rail input common-mode swing. Unlike previous DDCCs, the multiple-input bulk-driven technique is used in the proposed DDCC to reduce the number of transistors and to achieve the compactness. The proposed DDCC was designed using 0.18 µm TSMC CMOS technology with 0.3 V power supply and 38 nW power consumption. To confirm the workability of the new active device, a third-order elliptic filter using the proposed DDCCs as active device has been introduced as an application example. The proposed DDCC and its application have been designed and simulated in Cadence/Specter environment, and the simulated results prove the functionality and the attractive results of the new circuits.
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    Item type:Publication,
    Digitally programmable low-voltage highly linear transconductor based on promising CMOS structure of differential difference current conveyor
    (2015-07-01)
    Khateb, Fabian
    ;
    Lahiri, Abhirup
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    Psychalinos, Costas
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    Kumngern, Montree
    ;
    Kulej, Tomasz
    A digitally programmable low-voltage highly linear transconductor (G<inf>m</inf> stage) realization, using a promising CMOS structure of differential difference current conveyor (DDCC) and a R-2R ladder network, is introduced in this paper. Thanks to the efficiency of the DDCC CMOS structure, the transconductor exhibits excellent linearity in a wide range of the input voltage and its transconductance value is digitally programmable by the use of a R-2R ladder network. The CMOS structure of the DDCC is based on the latest bulk-driven quasi-floating-gate technique and hence it is capable to work under low-voltage power supply of ±0.5 V and consumes 36 μW of power. The differential input MOS transistor pairs of the proposed structure are simultaneously driven from bulk and quasi-floating-gate terminals; this leads to an increased value of the voltage gain, bandwidth, and input common-mode voltage range. The last one is the main benefit of this structure in comparison to already existing solutions. The proposed CMOS structure of the DDCC was designed and fabricated using 0.35 μm CMOS AMIS process with total chip area 213 μm × 266 μm. As an application example, a digitally programmable universal filter using three DDCCs and two grounded capacitors is presented.
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    Item type:Publication,
    Differential difference current conveyor using bulk-driven technique for ultra-low-voltage applications
    (2014-01-01)
    Khateb, Fabian
    ;
    Kumngern, Montree
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    Spyridon, Vlassis
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    Psychalinos, Costas
    Nowadays the necessity of having low-voltage operation and low-power consumption is essential for electronic devices, particularly for portable electronics. Therefore, this paper presents a new ultra-low-voltage CMOS topology for a differential difference current conveyor (DDCC) based on the bulk-driven (BD) principle. Due to the use of the BD technique, the proposed circuit is capable of working with a low supply voltage of ±0.3 V and consumes about 18.6 μW with a wide input common-mode range. The proposed BD-DDCC is suitable for ultra-low-voltage low-power applications. As application examples, a voltage-mode multifunction biquadratic filter based on two BD-DDCCs and four grounded passive elements, and a fourth-order band-pass filter are presented. All passive elements of both applications are grounded, which is advantageous for monolithic integration. Also, the input voltage signals are applied directly to the high input impedance terminals, which is a desirable feature for voltage-mode operation. The simulations were performed with PSPICE using the TSMC 0.18 μm n-well CMOS technology to prove the functionality and attractive results of the proposed circuit. © 2013 Springer Science+Business Media New York.
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    Item type:Publication,
    Voltage-mode multifunction biquadratic filters using new ultra-low-power differential difference current conveyors
    (2013-08-27)
    Kumngern, Montree
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    Khateb, Fabian
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    Dejhan, Kobchai
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    Phasukkit, Pattarapong
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    Tungjitkusolmun, Supan
    This paper presents two low-power voltagemode multifunction biquadratic filters using differential difference current conveyors. Each proposed circuit employs three differential difference current conveyors, two grounded capacitors and two grounded resistors. The low-voltage ultra-low-power differential difference current conveyor is used to provide low-power consumption of the proposed filters. By appropriately connecting the input and output terminals, the proposed filters can provide lowpass, band-pass, high-pass, band-stop and all-pass voltage responses at high-input terminals, which is a desirable feature for voltage-mode operations. The natural frequency and the quality factor can be orthogonally set by adjusting the circuit components. For realizing all the filter responses, no inverting-type input signal requirements as well as no component-matching conditional requirements are imposed. The incremental parameter sensitivities are also low. The characteristics of the proposed circuits are simulated by using PSPICE simulators to confirm the presented theory.
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    Item type:Publication,
    Resistorless realization of electronically tunable voltage-mode SIFO-type universal filter
    (2013-01-01)
    Tangsrirat, Worapong
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    Channumsin, Orapin
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    Pukkalanun, Tattaya
    In this work, an electronically tunable universal voltage-mode biquadratic filter with single input and five outputs is introduced. The proposed filter structure only employs three differential difference current conveyor transconductance amplifiers (DDCCTAs) and two grounded capacitors without needing any external passive resistor. All the five standard biquadratic filter functions; lowpass, bandpass, highpass, bandstop and allpass, can be realized simultaneously without imposing component choice and changing circuit configuration. In addition, the circuit also features the high-input impedance terminal, and provides an orthogonal electronic control of its natural angular frequency (ω<inf>o</inf>) and quality factor (Q) by adjusting only bias currents of the DDCCTAs for the fixed values of capacitors. © 2013 Elsevier Ltd. All rights reserved.