Roongmuanpha, Natchanai

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School of Engineering

natchanai.ro@kmitl.ac.th

Now showing 1 - 10 of 27

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Realization of Lossy Parallel Inductance Simulator Using Single VDGA and a Grounded Capacitor
(2022-01-01)
Satansup, Jetsdaporn
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Roongmuanpha, Natchanai
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Pukkalanun, Tattaya
;
Tangsrirat, Worapong
An active lossy parallel type inductance simulator is proposed in this study. Only a single voltage differencing gain amplifier (VDGA) and a grounded capacitor are used in the proposed design. The realized equivalent resistance (Req) and equivalent inductance (Leq) can be adjusted electronically via the transconductance gain of the VDGA device. The influence of the non-idealities of the VDGA on the realized simulator is examined in detail. The suggested active inductance simulator is used to realize the second order voltage mode highpass filter, which is simulated using the PSPICE simulation program to ensure that it performs as expected.
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Cascadable First-Order and Second-Order Inverse Filters Based on Second-Generation Voltage Conveyors
(2025-02-01)
Roongmuanpha, Natchanai
;
Likhitkitwoerakul, Nutcha
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Pukkalanun, Tattaya
;
Faseehuddin, Mohammad
;
Tangsrirat, Worapong
This study introduces four novel configurations of first-order and second-order multifunction inverse filters in both voltage-mode (VM) and current-mode (CM) using second-generation voltage conveyors (VCIIs). The first-order VM and CM inverse filters utilize only three passive components together with one VCII for VM and two VCIIs for CM realizations, which can provide lowpass and highpass inverse filter responses. The latter, second-order VM and CM multifunction inverse filters, can be constructed using the corresponding first-order inverse filters as their core circuits. These filters offer all the basic inverse filter functions, including lowpass, bandpass, and highpass inverse responses with all gains obtained from the same design. All the inverse filter realizations are cascadable. No component matching requirements are necessary for all filter responses. The non-ideal effects of the VCII on the performance of the proposed inverse filters are thoroughly examined. To prove the feasibility of the designs, the PSPICE program performed several simulations, utilizing model parameters of 0.18 µm CMOS technology. Some testing experiments were conducted using the commercially available IC-type AD844s for evaluating the practical performance of the designed inverse filters.
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Two-Quadrant Current-Mode Logarithmic and Anti-logarithmic Amplifiers with Temperature Compensation
(2025-09-01)
Pukkalanun, Tattaya
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Roongmuanpha, Natchanai
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Tangsrirat, Worapong
;
Suesut, Taweepol
This paper proposes circuit topologies for realizing two-quadrant current-mode logarithmic and anti logarithmic amplifier configurations with temperature compensation. The design approach employs the translinear approach to generate the output currents that directly correspond to the absolute values of the logarithmic and anti logarithmic functions. The proposed circuits can operate at a low-level supply voltage of 2V with both input and output current signals. A detailed examination of the non-ideal circuit performance has also been considered. To validate their functionality and illustrate their superior thermal stability, the developed circuits have been simulated. All simulations were conducted via PSPICE for a real bipolar transistor model of the HFA3096 technology.
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Dual-Mode Biquadratic Filter Employing Second-Generation Voltage Conveyors DM Biquadratic Filter Employing VCIIs
(2024-02-21)
Roongmuanpha, Natchanai
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Mongkolwai, Pratya
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Pukkalanun, Tattaya
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Tangsrirat, Worapong
In this paper, a dual-mode biquadratic filter is suggested. The proposed filter employs two Second-Generation Voltage Conveyors (VCIIs) along with four resistors and two capacitors. The suggested filter can realize all five standard biquadratic filter functions such as lowpass (LP), bandpass (BP), highpass (HP), bandstop (BS), and allpass (AP) in both voltage-mode (VM) and current-mode (CM) without needing to modify its circuit structure. The quality factor (Q) and natural angular frequency (ωo) can be accurately and separately controlled through the passive component. It additionally offers the capability of providing the output voltage at the low-output impedance terminal in VM. The effects of the VCII non-idealities on the filter performance have been analyzed in detail. The proposed filter also offers low active and passive sensitivity features. Simulation results achieved with PSPICE software using TSMC CMOS 0.18 μm parameter have been validated and compared with the theoretical findings.
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Floating capacitance multiplier realization based on commercially available integrated circuits
(2022-06-01)
Roongmuanpha, Natchanai
;
Tangsrirat, Worapong
This article is an attempt to present a tunable floating capacitance multiplier using commercially available integrated circuits, namely LT1228. The proposed design utilizes three LT1228s as active electronic components and only one capacitor as a passive component. The multiplication factor of the capacitance multiplier is electronically tunable via adjusting the external supply currents of the LT1228s. Besides, a careful analysis of the parasitic element effects is also included. To verify the practical features of the proposed floating capacitance multiplier circuit, several simulations using PSPICE program tool and extensive laboratory measurements were performed.
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Design and Synthesis of Capacitance Multiplier Using LT1228s and a Grounded Capacitor
(2026-01-01)
Channumsin, Orapin
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Roongmuanpha, Natchanai
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Likhitkitwoerakul, Nutcha
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Tangsrirat, Worapong
In this study, the design and synthesis of a grounded capacitance multiplier is discussed. The proposed circuit consists of two commercially available integrated circuits (ICs) named LT1228, together with a single grounded capacitor as a passive element. The transconductance gain of LT1228 allows for electronic control of the simulated equivalent capacitance value. The LT1228 transconductance gain is easily adjusted through the external bias current, which has a wide adjustable range of 1 µA to 1 mA. No component matching is required for the designed simulator. A non-ideal analysis of the proposed circuit has been investigated in detail. The workability of the proposed circuit and its application example as a first-order lowpass filter has been confirmed with the theoretical findings through PSPICE software. The results indicate that the proposed simulator has excellent performance and matches the theory.
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Finite-Time Integral Backstepping Nonsingular Terminal Sliding Mode Control to Synchronize a New Six-Term Chaotic System and Its Circuit Implementation
(2023-01-01)
Wongvanich, Napasool
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Roongmuanpha, Natchanai
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Tangsrirat, Worapong
This work presents the finite-time synchronization of a new six-term chaotic system with only stable equilibria and its circuitry implementation. The chaotic system is designed in such a way that its complex dynamical behavior, including hidden attractors, can be adjusted through only one parameter, whilst allowing transformation to chaotic flows via invariant transformations. A finite-time chaotic synchronizer is designed via a nonsingular terminal integral backstepping sliding mode controller, with reduced theoretical finite-time convergence, and a modified sliding surface, to accommodate analog circuitry implementations. A comparison between the proposed controller against conventional integral backstepping sliding mode controller showed that active synchronization is achieved in finite time. Finally, analog circuitry implementation for both open-loop and closed-loop configurations is realized via commercially available active components such as LF357 and AD633. The descriptive circuitry equations for both configurations are designed to mimic the actual governing control equations for simplicity and ease of circuit troubleshooting. The workability of both configurations was tested in OrCAD PSpice. Results show that the master and slave systems were found to be in synchronization with less than 0.95% maximum errors.
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Floating general immittance function simulator
(2021-04-01)
Likhitkitwoerakul, Nutcha
;
Roongmuanpha, Natchanai
;
Tangsrirat, Worapong
A floating general immittance function simulator circuit is presented using two differential voltage to current converters (DVTCs) and three passive components. The developed DVTC to be used in this work is realized with the flipped voltage follower, achieving low-voltage operation. By selecting proper passive components, the proposed floating simulator circuit can realize synthetic inductor, capacitor, resistor and frequency-dependent negative resistance (FDNR) without changing its configuration. No component matching conditions and cancellation constraints are necessary. Furthermore, non-ideal transfer gain effects on the proposed simulator circuit are discussed. As applications for the proposed floating simulator, a second-order RLC bandpass filter and a fourth-order resistively terminated LC bandpass filter are shown. To verify the theory, the proposed simulator and its applications are simulated using 0.25-μm CMOS process technology.
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VDTA-Based Mixed-Mode Inverse Filter and Its Application to Mixed-Mode PID Controller
(2026-04-01)
Roongmuanpha, Natchanai
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Pukkalanun, Tattaya
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Faseehuddin, Mohammad
;
Tangsrirat, Worapong
This paper presents a novel voltage differencing transconductance amplifier (VDTA)-based mixed-mode inverse filter capable of operating in voltage mode, transadmittance mode, transimpedance mode, and current mode using a single topology. The proposed configuration employs only three VDTAs with two resistors and three capacitors, offering low component count, high input/output impedance flexibility, and no requirement for component matching. It simultaneously realizes first-order inverse lowpass and highpass, as well as second-order inverse bandpass responses. A comprehensive non-ideal analysis, which includes the effects of VDTA parasitic impedances, determines the practical operating frequency range. The design is validated through PSPICE simulations using 0.18 μm CMOS technology, showing close alignment between theoretical predictions and simulation results, with cutoff frequencies of approximately 1.60 MHz and low power consumption of 0.972 mW. Further analyses confirm orthogonal tuning capability, acceptable temperature stability, and robustness against component tolerances. In a practical application, the proposed inverse filter is employed to implement a mixed-mode PID controller, which significantly improves transient response characteristics by reducing rise time, settling time, and steady-state error. These findings highlight the effectiveness and versatility of the proposed design for analog signal processing and control system applications.
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Grounded Series and Parallel RL/RC Immittance Simulators Using a Single Second-Generation Voltage Conveyor
(2026-01-01)
Roongmuanpha, Natchanai
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Tangjit, Jetwara
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Pukkalanun, Tattaya
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Faseehuddin, Mohammad
;
Tangsrirat, Worapong
This work proposes the active simulation of grounded series and parallel resistive-inductive (RL) and resistive-capacitive (RC) immittance functions employing a single second-generation voltage conveyor (VCII) and three passive components. The two configurations are designed for series RL and RC immittance simulation and RL and parallel RC immittance simulation, respectively. All of the simulated immittance functions can be realized without any specific component matching or cancellation limitations. The proposed series and parallel RL and RC immittance function simulators have been simulated with PSPICE program based on 0.18 µm CMOS process parameters to validate the theoretical study. The first-order inverse filters, biquadratic filter, and synthetic lossless inductor applications, constructed with the proposed simulator circuits, are designed and evaluated to further demonstrate the practical usefulness of the designed simulators.

Roongmuanpha, Natchanai

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