Roongmuanpha, Natchanai
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Roongmuanpha, Natchanai
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natchanai.ro@kmitl.ac.th
19 results
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Item type:Publication, Cascadable First-Order and Second-Order Inverse Filters Based on Second-Generation Voltage Conveyors(2025-02-01); ;Likhitkitwoerakul, Nutcha; ;Faseehuddin, MohammadThis study introduces four novel configurations of first-order and second-order multifunction inverse filters in both voltage-mode (VM) and current-mode (CM) using second-generation voltage conveyors (VCIIs). The first-order VM and CM inverse filters utilize only three passive components together with one VCII for VM and two VCIIs for CM realizations, which can provide lowpass and highpass inverse filter responses. The latter, second-order VM and CM multifunction inverse filters, can be constructed using the corresponding first-order inverse filters as their core circuits. These filters offer all the basic inverse filter functions, including lowpass, bandpass, and highpass inverse responses with all gains obtained from the same design. All the inverse filter realizations are cascadable. No component matching requirements are necessary for all filter responses. The non-ideal effects of the VCII on the performance of the proposed inverse filters are thoroughly examined. To prove the feasibility of the designs, the PSPICE program performed several simulations, utilizing model parameters of 0.18 µm CMOS technology. Some testing experiments were conducted using the commercially available IC-type AD844s for evaluating the practical performance of the designed inverse filters. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Two-Quadrant Current-Mode Logarithmic and Anti-logarithmic Amplifiers with Temperature CompensationThis paper proposes circuit topologies for realizing two-quadrant current-mode logarithmic and anti logarithmic amplifier configurations with temperature compensation. The design approach employs the translinear approach to generate the output currents that directly correspond to the absolute values of the logarithmic and anti logarithmic functions. The proposed circuits can operate at a low-level supply voltage of 2V with both input and output current signals. A detailed examination of the non-ideal circuit performance has also been considered. To validate their functionality and illustrate their superior thermal stability, the developed circuits have been simulated. All simulations were conducted via PSPICE for a real bipolar transistor model of the HFA3096 technology. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Floating capacitance multiplier realization based on commercially available integrated circuits(2022-06-01); This article is an attempt to present a tunable floating capacitance multiplier using commercially available integrated circuits, namely LT1228. The proposed design utilizes three LT1228s as active electronic components and only one capacitor as a passive component. The multiplication factor of the capacitance multiplier is electronically tunable via adjusting the external supply currents of the LT1228s. Besides, a careful analysis of the parasitic element effects is also included. To verify the practical features of the proposed floating capacitance multiplier circuit, several simulations using PSPICE program tool and extensive laboratory measurements were performed. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Finite-Time Integral Backstepping Nonsingular Terminal Sliding Mode Control to Synchronize a New Six-Term Chaotic System and Its Circuit Implementation(2023-01-01); ; This work presents the finite-time synchronization of a new six-term chaotic system with only stable equilibria and its circuitry implementation. The chaotic system is designed in such a way that its complex dynamical behavior, including hidden attractors, can be adjusted through only one parameter, whilst allowing transformation to chaotic flows via invariant transformations. A finite-time chaotic synchronizer is designed via a nonsingular terminal integral backstepping sliding mode controller, with reduced theoretical finite-time convergence, and a modified sliding surface, to accommodate analog circuitry implementations. A comparison between the proposed controller against conventional integral backstepping sliding mode controller showed that active synchronization is achieved in finite time. Finally, analog circuitry implementation for both open-loop and closed-loop configurations is realized via commercially available active components such as LF357 and AD633. The descriptive circuitry equations for both configurations are designed to mimic the actual governing control equations for simplicity and ease of circuit troubleshooting. The workability of both configurations was tested in OrCAD PSpice. Results show that the master and slave systems were found to be in synchronization with less than 0.95% maximum errors. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Floating general immittance function simulator(2021-04-01) ;Likhitkitwoerakul, Nutcha; A floating general immittance function simulator circuit is presented using two differential voltage to current converters (DVTCs) and three passive components. The developed DVTC to be used in this work is realized with the flipped voltage follower, achieving low-voltage operation. By selecting proper passive components, the proposed floating simulator circuit can realize synthetic inductor, capacitor, resistor and frequency-dependent negative resistance (FDNR) without changing its configuration. No component matching conditions and cancellation constraints are necessary. Furthermore, non-ideal transfer gain effects on the proposed simulator circuit are discussed. As applications for the proposed floating simulator, a second-order RLC bandpass filter and a fourth-order resistively terminated LC bandpass filter are shown. To verify the theory, the proposed simulator and its applications are simulated using 0.25-μm CMOS process technology. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, VDTA-Based Mixed-Mode Inverse Filter and Its Application to Mixed-Mode PID Controller(2026-04-01); ; ;Faseehuddin, MohammadThis paper presents a novel voltage differencing transconductance amplifier (VDTA)-based mixed-mode inverse filter capable of operating in voltage mode, transadmittance mode, transimpedance mode, and current mode using a single topology. The proposed configuration employs only three VDTAs with two resistors and three capacitors, offering low component count, high input/output impedance flexibility, and no requirement for component matching. It simultaneously realizes first-order inverse lowpass and highpass, as well as second-order inverse bandpass responses. A comprehensive non-ideal analysis, which includes the effects of VDTA parasitic impedances, determines the practical operating frequency range. The design is validated through PSPICE simulations using 0.18 μm CMOS technology, showing close alignment between theoretical predictions and simulation results, with cutoff frequencies of approximately 1.60 MHz and low power consumption of 0.972 mW. Further analyses confirm orthogonal tuning capability, acceptable temperature stability, and robustness against component tolerances. In a practical application, the proposed inverse filter is employed to implement a mixed-mode PID controller, which significantly improves transient response characteristics by reducing rise time, settling time, and steady-state error. These findings highlight the effectiveness and versatility of the proposed design for analog signal processing and control system applications. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Grounded Series and Parallel RL/RC Immittance Simulators Using a Single Second-Generation Voltage Conveyor(2026-01-01); ;Tangjit, Jetwara; ;Faseehuddin, MohammadThis work proposes the active simulation of grounded series and parallel resistive-inductive (RL) and resistive-capacitive (RC) immittance functions employing a single second-generation voltage conveyor (VCII) and three passive components. The two configurations are designed for series RL and RC immittance simulation and RL and parallel RC immittance simulation, respectively. All of the simulated immittance functions can be realized without any specific component matching or cancellation limitations. The proposed series and parallel RL and RC immittance function simulators have been simulated with PSPICE program based on 0.18 µm CMOS process parameters to validate the theoretical study. The first-order inverse filters, biquadratic filter, and synthetic lossless inductor applications, constructed with the proposed simulator circuits, are designed and evaluated to further demonstrate the practical usefulness of the designed simulators. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Single VDGA-Based Mixed-Mode Electronically Tunable First-Order Universal Filter(2023-03-01); ;Likhitkitwoerakul, Nutcha ;Fukuhara, MasaakiThis article presents a mixed-mode electronically tunable first-order universal filter configuration employing only one voltage differencing gain amplifier (VDGA), one capacitor, and one grounded resistor. With the appropriate selection of the input signals, the proposed circuit can realize all three first-order standard filter functions, namely low pass (LP), high pass (HP), and all pass (AP), in all four possible modes, including voltage mode (VM), trans-admittance mode (TAM), current mode (CM), and trans-impedance mode (TIM), from the same circuit structure. It also provides an electronic tuning of the pole frequency and the passband gain by varying transconductance values. Non-ideal and parasitic effect analyses of the proposed circuit were also carried out. PSPICE simulations and experimental findings have both confirmed the performance of the design. A number of simulations and experimental observations confirm the viability of the suggested configuration in practical applications. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Design of Mixed-Mode Analog PID Controller with CFOAs(2024-05-01); ;Satansup, Jetsdaporn; The design of a mixed-mode proportional-integral-derivative (PID) controller circuit using current-feedback operational amplifiers (CFOAs) as active components is proposed. With the same circuit topology, the proposed configuration of three CFOAs, four resistors, and two capacitors is capable of performing the PID controller in each of the following four modes: voltage mode, trans-admittance mode, current mode, and trans-impedance mode. Numerous mathematical analyses are conducted to determine the controller’s performance under both ideal and non-ideal conditions. Additionally, the mixed-mode second-order lowpass filter is suggested and also used to examine the workability of the proposed mixed-mode PID controller in a feedback control structure. The proposed PID controller is implemented with the commercially available IC-type CFOA AD844, and the simulation results are presented to illustrate the functionality of the controller and its closed-loop control system. According to the findings, the total power consumption of the proposed PID controller is 0.348 W, with symmetrical supply voltages of ±9 V. It also has a temperature variation of less than 0.2% over the AD844’s usable range. Monte Carlo statistical analysis results revealed that the gain responses of the controller exhibited a deviation of no more than 7.72% from the theoretical value. The controlled filter in a closed-loop control system has a 43% faster rise time and peak time than the uncontrolled filter in all four modes of operation. It also has a steady-state error less than 0.2 mV for voltage responses and 0.72 µA for current responses. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Tunable mixed-mode voltage differencing buffered amplifier-based universal filter with independently high-q factor controllability(2021-10-01); ;Faseehuddin, Mohammad ;Herencsar, NorbertThis paper proposes the design of a mixed-mode universal biquad configuration, which realizes generic filter functions in all four possible modes, namely voltage mode (VM), current mode (CM), transadmittance mode (TAM), and transimpedance mode (TIM). The filter architecture employs two voltage differencing buffered amplifiers (VDBAs), two resistors and two capacitors, and can provide lowpass (LP), bandpass (BP), highpass (HP), bandstop (BS), and allpass (AP) bi-quadratic filtering responses without any circuit alteration. All passive elements used are grounded, except VM. The circuit not only allows for the electronic tuning of the natural angular frequency (ωo), but also achieves orthogonal tunability of the quality factor (Q). It also provides the feature of availability of output voltage at the low-output impedance terminal in VM and TIM, and does not require inverting-type or double-type input signals to realize all the responses. Moreover, in all modes of operation, the high-Q filter can be easily obtained by adjusting a single resistance value. Influences of the VDBA nonidealities and parasitic elements are also discussed in detail. PSPICE simulations with TSMC 0.18-µm CMOS process parameters and experimental testing results with commercially available IC LT1228s have been used to validate the theoretical predictions.
