Julsereewong, Amphawan
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Preferred name
Julsereewong, Amphawan
Alternative Name
Julsereewong, A.
Main Affiliation
Email
amphawan.ju@kmitl.ac.th
43 results
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Item type:Publication, A simple CMOS-based algorithmic ADC(2007-12-01); ; This paper presents a one-bit cell of reverse Gray-code algorithmic analog-to-digital converter. The proposed converter comprises of full-wave rectifier, current mirrors, and current comparator. The realization method is simple, small in size, and suitable for integrated circuit form. The design strategy is based on the MOS biased at the edge of conduction to provide a low accumulated error and a low distortion in the transfer characteristic. An N-bit resolution can be achieved by cascading of the N proposed one-bit cells. PSPICE simulation results supporting the characteristics of proposed circuit are agreed with the expected values. © ICROS. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Study on field control locations for Foundation Fieldbus-based cascade control loop(2012-01-01); - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Analog median filtering circuit using CMOS three-input max/min cell(2018-06-08); Junsing, TipparatThis paper presents a current-mode design technique for complementary metal oxide semiconductor (CMOS) implementation of an analog median filtering circuit for real-time signal processing. The proposed three-input median filtering circuit consists of three-input maximum/ minimum (max/min) cell, dual-output current mirrors, and current summation. The max/min cell used is based on an existing multiple-input max/min circuit for simultaneously determining the maximum and minimum values of input signals to overcome the limitations of tree realization by using two-input max/min selectors. Additionally, transistors used in the max/min cell are biased at the edge of conduction to minimize corner errors. PSPICE simulation results are given to verify the operation of the proposed median filtering circuit. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Foundation fieldbus-based laboratory: A case study of Harmonas-DEO system(2011-01-01); ; ; Julsereewong, PrasitThis paper presents a Foundation Fieldbus-based laboratory for education of automation infrastructure. Design and implementation of a level-control plant model using multi-vendor field devices is proposed. Harmonas-DEO fieldbus system is described as an illustrative case study for configuring and commissioning fieldbus segment, defining control strategy, designing human machine interface (HMI) screen, and troubleshooting. Fieldbus control valve diagnostics based on the use of Valstaff are also included. © 2011 SICE. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Digital fieldbus-Analog system integration for revamping projectsThis paper presents a system integration of modern digital fieldbus and traditional analog devices for revamping projects. Using temperature transmitter with Foundation Fieldbus technology and power regulator with 4-20 mA control input for temperature control based on a PID instruction of programmable logic controller (PLC) is examined as an illustrative case study. A portable plant model was designed and implemented for real hands-on training. In addition, basic network and device configurations as well as ladder logic program and graphical user interface creations are discussed. Experimental results of temperature control in the range of 40-60 °C verifying the proposed concept are also included. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Enhanced differential voltage-to-Frequency converter for telemetry applications(2010-01-01); This paper presents an enhanced differential voltage-to-Frequency (dVFC) suitable for telemetry applications. The realization method employs op-amps in conjunction with current conveyors and Set-Reset latch. The converter gain can be easily adjusted through the variation of a single resistor. Compared to the previous dVFC using only current conveyors and Set-Reset latch, the proposed converter offers significant improvements in accuracy and circuit configuration. Its benefits are higher accuracy, simpler structure, fewer components, and lower costs. Experimental results verifying performances of the proposed dVFC are closely agreed with expected values. © 2010 SICE. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Simple vector summation circuit using opamps(2011-01-01); ; This paper presents a vector summation circuit using operational amplifiers (opamps) for multiple voltage inputs. The implementation method based on the opamp supply-current sensing utilizes an inherently quadratic characteristic of the opamp class-AB output stage. The distinguishing features of the proposed implementation are simple configuration and low cost. Experimental results verifying the performances of the proposed vector summation circuit are included. © 2011 SICE. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Simple square-rooting voltage-to-frequency converter using opamps(2010-12-01); This paper presents a simple method based on commercially available operation amplifiers (Opamps) for realizing the square-rooting voltage-to-frequency converter (VFC). The realization of square-root function is provided through the use of the opamp supply-current sensing, which utilizes an inherent quadratic characteristic of the opamp class-AB output state. Experimental results verifying the performances of the proposed square-rooting VFC are included. ©ICROS. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Comparative study on cascade control configuration in engineering phase for analog system and FF system(2017-02-06) - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A voltage/current controlled oscillator using OTAs and RS flip flop(2008-12-01); ;